MT46V32M16BN-6:FTR Micron Technology Inc, MT46V32M16BN-6:FTR Datasheet - Page 80

• Manufacturer Part Number: MT46V32M16BN-6:FTR
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M16BN-6:FTR

• Lead Free Status / Rohs Status: Compliant

Figure 45:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Address
t DQSS (NOM)
t DQSS (MIN)
t DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-PRECHARGE – Uninterrupting
Notes:
Bank a,
WRITE
Col b
T0
t DQSS
t DQSS
t DQSS
1. DI b = data-in for column b.
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4.
5. The PRECHARGE and WRITE commands are to the same device. However, the PRECHARGE
6. A10 is LOW with the WRITE command (auto precharge is disabled).
t
and WRITE commands may be to different devices, in which case
the PRECHARGE command could be applied earlier.
DI
b
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
DI
T1
b
DI
b
T1n
NOP
T2
T2n
80
NOP
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t WR
NOP
T4
512Mb: x4, x8, x16 DDR SDRAM
Transitioning Data
(a or all)
Bank,
T5
PRE
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t
WR is not required, and
t RP
T6
NOP
Operations
Don’t Care