ISL8200MEVAL1PHZ Intersil, ISL8200MEVAL1PHZ Datasheet - Page 17

• Manufacturer Part Number: ISL8200MEVAL1PHZ
• Description: EVAL BAORD FOR ISL8200
• Manufacturer: Intersil
• Series: -r

Specifications of ISL8200MEVAL1PHZ

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 0.6 ~ 6 V
• Current - Output: 10A
• Voltage - Input: 3 ~ 20 V
• Regulator Topology: Buck
• Frequency - Switching: 700kHz ~ 1.5MHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL8200
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

OC trip set by 1.2V comparator can be lower than
108µA trip point as shown in Equation 6.
where N
in parallel or multi-module operations; I
I
minimum U
in Equation 7 represents the total equivalent resistance
in ISHARE pin bus of all ICs in multiphase or module
parallel operation.
ISL8200M has a low-side FET with typical r
9mΩ (V
Note: ISL8200M has integrated 2.2kΩ resistance
(R
is:
The OC trip point varies in a system mainly due to the
MOSFET r
temperature). To avoid overcurrent tripping in the normal
operating load range, find the R
Equation 8 of I
where ΔI
The relationships between the external R
and the typical output current I
ISL8200M are as follows:
R
R
R
1. The maximum r
2. The minimum I
3. Determine I
OC
ISHARE
SEN
ISEN1
SEN-IN
temperature
Specifications” table on page 9.
I
is the load overcurrent trip point; T
OC
R
=
SEN-EX
OPEN
50kΩ
20kΩ
10kΩ
>
5kΩ
3kΩ
2kΩ
GS
(Ω)
=
R
--------------------------------------------------------
R
CNTL
I
L
=
). Therefore, the equivalent resistance of R
SEN-EX
SEN-EX
OUT MAX
DS(ON)
⎛
⎜
⎝
-----------------------------------------------------------------------------------------------------------------------
is the output inductor ripple current.
I
-------------- -
I
= 10V, I
OC
1.2V
TRIP
GATE
(
is the number of the ISL8200M modules
+
PEAK
V
--------------- -
OC
×
+
OUT
turn off time that is 350ns; R
)
variations (over process, current and
L
R
R
+
DS
SEN-IN
SEN-IN
SOURCE
for:
DS(ON)
(
-------------
with:
ΔI
•
R
2
⎛
⎝
= 30A).
L
ISET
--------------- - T
2F
)
1 D
TABLE 2.
–
17
SW
I
TRIP
=
at the highest junction
from the “Electrical
–
R
OUT(MAX)
ISHARE
MIN_OFF
SEN
OCP (A) @
V
IN
15.5
14.5
12.5
resistor from
17
14
11
= 12V
8
⋅
⎞
⎠
N
⎞
⎟
⎠
CNTL
MIN_OFF
SEN-EX
•
TRIP
OCP levels for
RDS
DS(ON)
= 108µA;
ISHARE
values
(EQ. 7)
(EQ. 8)
is the
(EQ. 6)
of
ISL8200M
SEN
In a high input voltage, high output voltage
application, such as 20V input to 5V output, the
inductor ripple becomes excessive due to the fix
internal inductor value. In such application, the output
current will be limited from the rating to approximately
70% of the module’s rated current.
When OCP is triggered, the controller pulls EN low
immediately to turn off UGATE and LGATE.
For overload and hard short condition, the overcurrent
protection reduces the regulator RMS output current
much less than full load by putting the controller into
hiccup mode. A delay time, equal to 3 soft-start
intervals, is entered to allow the disturbance to be
cleared out. After the delay time, the controller then
initiates a soft-start interval. If the output voltage
comes up and returns to the regulation, PGOOD
transitions high. If the OC trip is exceeded during the
soft-start interval, the controller pulls EN low again.
The PGOOD signal will remain low and the soft-start
interval will be allowed to expire. Another soft-start
interval will be initiated after the delay interval. If an
overcurrent trip occurs again, this same cycle repeats
until the fault is removed.
Oscillator
The Oscillator is a sawtooth waveform, providing for
leading edge modulation with 350ns minimum dead
time. The oscillator (Sawtooth) waveform has a DC
offset of 1.0V. Each channel’s peak-to-peak of the
ramp amplitude is set to proportional the voltage
applied to its corresponding FF pin.
Frequency Synchronization and Phase Lock
Loop
The FSYNC_IN pin has two primary capabilities: fixed
frequency operation and synchronized frequency
operation. By tying a resistor (R
FSYNC_IN pin, the switching frequency can be set at
any frequency between 700kHz and 1.5MHz. ISL8200M
has integrated 59kΩ resistor between FSYNC_IN and
PGND1, which set the default frequency to 700kHz.
The frequency setting curve shown in Figure 27 is
provided to assist in selecting the an externally
connected resistor RFS-ext between FSYNC_IN and
PGND1 to increase the switching frequency.
FS
) to PGND1 from the
February 26, 2010
FN6727.1