STM8L151F3U6 STMicroelectronics, STM8L151F3U6 Datasheet - Page 84
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STM8L151F3U6
Manufacturer Part Number
STM8L151F3U6
Description
MCU 8BIT 8KB FLASH 20-UFQFPN
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet
1.STM8L151G3U6.pdf
(110 pages)
Specifications of STM8L151F3U6
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-UFQFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11495-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L151F3U6
Manufacturer:
ST
Quantity:
2 000
Part Number:
STM8L151F3U6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM8L151F3U6TR
Manufacturer:
TI
Quantity:
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Company:
Part Number:
STM8L151F3U6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Electrical parameters
Note:
84/110
I
Subject to general operating conditions for V
The STM8L I
protocol described in the following table with the restriction mentioned below:
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SDA and SCL).
Table 40.
1. f
2. Data based on standard I
For speeds around 200 kHz, the achieved speed can have a
For other speed ranges, the achieved speed can have a
The above variations depend on the accuracy of the external components used.
2
t
w(STO:STA)
C - Inter IC control interface
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
t
su(STO)
t
t
t
su(STA)
h(SDA)
r(SDA)
f(SDA)
h(STA)
r(SCL)
f(SCL)
SYSCLK
C
b
must be at least equal to 8 MHz to achieve max fast I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
Repeated START condition setup
time
STOP condition setup time
STOP to START condition time (bus
free)
Capacitive load for each bus line
2
I2C characteristics
C interface (I2C1) meets the requirements of the Standard I
2
Parameter
C protocol requirement, not tested in production.
Doc ID 018780 Rev 2
DD
, f
Min
SYSCLK
Standard mode
250
4.7
4.0
4.0
4.7
4.0
4.7
0
(2)
2
C speed (400 kHz).
I
2
±
, and T
C
2% tolerance
Max
1000
300
400
±
5% tolerance
(2)
A
STM8L151x2, STM8L151x3
unless otherwise specified.
Fast mode I
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
0
(2)
2
C communication
Max
900
300
300
400
2
C
(1)
(2)
Unit
pF
μs
ns
μs
μs
μs