PIC18F2680-H/SP Microchip Technology, PIC18F2680-H/SP Datasheet - Page 388
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F2680-H/SP
Manufacturer Part Number
PIC18F2680-H/SP
Description
IC MCU 8BIT 48KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F4585-IPT.pdf
(482 pages)
Specifications of PIC18F2680-H/SP
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F2585/2680/4585/4680
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39625C-page 386
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
MOVFF f
0 ≤ f
0 ≤ f
(f
None
The contents of source register ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register
2
2
MOVFF
s
Read
(src)
read
) → f
1100
1111
No
Q2
=
=
=
=
s
d
≤ 4095
≤ 4095
d
is particularly useful for
33h
11h
33h
33h
s
REG1, REG2
,f
ffff
ffff
d
operation
Process
Data
No
Q3
s
’ can be anywhere
ffff
ffff
register ‘f’
operation
(dest)
Write
d
No
Q4
fff
fff
’.
s
’ are
d
Preliminary
f
f
’
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR Register =
BSR Register =
Q1
Move Literal to Low Nibble in BSR
MOVLW k
0 ≤ k ≤ 255
k → BSR
None
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘
regardless of the value of k
1
1
literal ‘k’
MOVLB
Read
0000
Q2
© 2007 Microchip Technology Inc.
02h
05h
0001
Process
5
Data
Q3
kkkk
Write literal
7
‘k’ to BSR
:k
4
0
.
Q4
’,
kkkk
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