PIC16LF1933-I/MV Microchip Technology, PIC16LF1933-I/MV Datasheet - Page 38
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16LF1933-I/MV
Manufacturer Part Number
PIC16LF1933-I/MV
Description
IC MCU 8BIT 7KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1933-IMV.pdf
(430 pages)
Specifications of PIC16LF1933-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF1933-I/MV
Manufacturer:
MICROCHIP
Quantity:
4 500
Part Number:
PIC16LF1933-I/MV
Manufacturer:
MICROCHI
Quantity:
20 000
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PIC16(L)F1933
TABLE 3-9:
DS41575A-page 38
x00h/
x80h
x00h/
x81h
x02h/
x82h
x03h/
x83h
x04h/
x84h
x05h/
x85h
x06h/
x86h
x07h/
x87h
x08h/
x88h
x09h/
x89h
x0Ah/
x8Ah
x0Bh/
x8Bh
x0Ch/
x8Ch
x1Fh/
x9Fh
Legend:
Note
Address
Banks 9-14
—
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1),(2)
(2)
1:
2:
3:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
Name
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to Address Data Memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to Address Data Memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Bit 7
GIE
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
PEIE
Bit 6
—
—
TMR0IE
Bit 5
—
—
Preliminary
Bit 4
INTE
TO
IOCIE
Bit 3
PD
BSR<4:0>
TMR0IF
Bit 2
Z
2011 Microchip Technology Inc.
Bit 1
INTF
DC
IOCIF
Bit 0
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
POR, BOR
Value on
—
Value on all
Resets
other
—
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