LFE2-50E-6FN672C Lattice, LFE2-50E-6FN672C Datasheet - Page 100
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-50E-6FN672C
Manufacturer Part Number
LFE2-50E-6FN672C
Description
IC FPGA 48KLUTS 672FPBGA
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-50E-6FN672C
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-50E-6FN672C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 100 of 385
- Download datasheet (3Mb)
Lattice Semiconductor
Switching Test Conditions
Figure 3-23 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3-18.
Figure 3-22. Output Test Load, LVTTL and LVCMOS Standards
Table 3-18. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
R2
T
1MΩ
100
R
∞
∞
∞
1
3-49
1MΩ
100
R
∞
∞
∞
CL*
2
Test Poi nt
0pF
C
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
L
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.10
- 0.10
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
CCIO
CCIO
V
—
—
—
—
—
—
—
T
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