MICRF507YML Micrel Inc, MICRF507YML Datasheet - Page 23
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MICRF507YML
Manufacturer Part Number
MICRF507YML
Description
Manufacturer
Micrel Inc
Datasheet
1.MICRF507YML.pdf
(46 pages)
Specifications of MICRF507YML
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Lead Free Status / Rohs Status
Compliant
Table 12 shows three different loop filter designs, the first
two for VCO modulation and the last one for modulation
using the internal dividers. The component values are
calculated with RF frequency = 490MHz, VCO gain =
67MHz/V as seen by the PLL, and desired phase margin =
56º. Other settings are shown in the table. The VARIN pin
capacitance (pin 29) of 6pF can be neglected for the two
filters with lowest bandwidth (which have R2=0 and
relatively large values of C1). For other loop bandwidth
and phase detector values, use the loop filter calculation
tool in RF Testbench software available on Micrel’s
website.
March 2010
Micrel, Inc.
CP_OUT
Figure 14. Second and Third Order Loop Filter
Pin 27
VCO
VCO
Divider
C1
Encoded
Bit Rate
(kbps)
<6.5
>32
>8
R1
C2
R2
(kHz)
PLL
BW
0.8
3.2
13
C3
Table 12. Loop Filter Component Values
Charge
Pump
(μA)
125
125
500
VARIN
Pin 29
Freq. (kHz)
Detector
Phase
100
100
500
23
Lock Detect
A lock detector can be enabled by setting LD_en = 1.
When pin LD is high, it indicates that the PLL is in lock.
After a control word is loaded LD will (typically) go low,
then high again when the synthesizer has locked. LD also
goes low initially when the PA (power amplifier) is turning
on.
After the transceiver has been put into Receive or
Transmit mode, or after the power amplifier has been
turned on, a low-to-high transition at LD can serve as an
indicator that the synthesizer frequency has stabilized.
390pF
680pF
10nF
C1
100nF
6.8nF
8.2nF
C2
6.2kΩ
22kΩ
5kΩ
R1
68kΩ
R2
0
0
18pF
NC
NC
C3
M9999-032210-B
MICRF507