MICRF507YML Micrel Inc, MICRF507YML Datasheet - Page 22

• Manufacturer Part Number: MICRF507YML
• Manufacturer: Micrel Inc

Specifications of MICRF507YML

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Modulation Type: FSK
• Lead Free Status / Rohs Status: Compliant

N, M, and A are numbers of length 12, 12 and 6 bits,
respectively The synthesizer’s output frequency can be
calculated from the following equation:
1 ≤ A ≤ 16
where
The MICRF507 has two sets of register fields controlling
the synthesizer’s frequency multiplication ratio; A0/N0/M0
and
modulation (see “Divider Modulation” section), bit values of
‘0’ and ‘1’ respectively select the 0 and 1 register field set.
During reception and during transmission using VCO
modulation, only the 0 set is used.
VCO
The VCO has no external components.
The three-bit field VCO_IB controls VCO bias current to
optimize phase noise. The two bit field VCO_freq controls
a capacitor bank which determines the VCO frequency
range. These five bits are set according to the RF
frequency as follows:
RF
Freq
470-
482MHz
482-
497MHz
497-
510MHz
The tuning range, the RF frequency versus VCO tune
voltage (varactor input, pin 29), depends on the VCO
frequency setting as shown in as shown in Figure 13.
When the tuning voltage is in the range from 0.9V to 1.4V,
the VCO gain (as seen by the PLL) is at its maximum,
approximately 64 to 70MHz/V. Note that the RF frequency
is half of the PLL frequency. It is recommended that the
VCO tune voltage stays in this range.
March 2010
f
RF
Micrel, Inc.
=
f
XCO
A1/N1/M1.
f
f
f
f
PD
XCO
VCO
RF
VCO_IB2 VCO_IB1 VCO_IB0 VCO_freq1 VCO_freq0
16
f
PD
: RF carrier frequency
: Phase detector comparison frequency
×
: Crystal oscillator frequency
: Voltage controlled oscillator frequency
1
1
0
2M
=
N
f
+
XCO
M
A
Table 11. VCO Bit Setting
=
During
(
16
0
0
1
×
N
f
VCO
M≠0
+
transmission
A
)
1
0
1
×
2
=
(
16
f
RF
×
0
1
1
N
×
using
+
2
A
)
divider
1
0
1
22
The input capacitance at the varactor pin must be taken
into consideration when designing the PLL loop filter. This
is most critical when designing a loop filter with high
bandwidth, which gives relatively small component values.
The input capacitance is approximately 6pF.
Charge Pump
The charge pump current can be set to either 125µA or
500µA by CP_HI (‘1’ → 500µA). This will affect the loop
gain and, consequently, filter component values. For
applications using high phase detector frequency and high
PLL bandwidth, use 500µA charge pump current.
PLL Filter
The design of the PLL filter strongly affects the
performance of the frequency synthesizer. Key parameters
in PLL filter design are loop bandwidth, the modulation
method (VCO modulation or divider modulation) and the
bit rate. Filter design also affect the switching time
(important when frequency hopping) and phase noise.
Divider modulation requires the PLL to lock on a new
carrier frequency for every new data bit. As a rule of
thumb, the PLL loop bandwidth should be at least twice as
high as the bit rate. In such cases it is recommended to
use a third order filter to suppress the phase detector
frequency.
For VCO modulation, the PLL loop bandwidth should be
less than 1/10 of the bit rate. If the loop bandwidth is high
relative to the bit rate, the PLL will keep the VCO at a fixed
frequency, preventing it from being modulated.
The recommended third-order loop filter (made with
external components) is shown in Figure 14. When R2=0
and C3 is omitted, this reduces to a second-order loop
filter.
540
530
520
510
500
490
480
470
460
450
Figure 13. RF Frequency vs. Varactor Voltage
0
0.4
and VCO_ Freq bits (V
RF Frequency vs Varactor Input Voltage
0.8
VARIN Voltage (V)
1.2
1.6
DD
= 2.5V)
2
M9999-032210-B
MICRF507
2.4
11
10
01