MT8985AL Zarlink, MT8985AL Datasheet - Page 8

• Manufacturer Part Number: MT8985AL
• Description: Switch Fabric 256 x 256 16.384Mbps 5V 44-Pin MQFP Tray
• Manufacturer: Zarlink

Specifications of MT8985AL

• Package: 44MQFP
• Number Of Ports: 8
• Fabric Size: 256 x 256
• Switching Bandwidth: 16.384 Mbps
• Switch Core: Non-Blocking
• Port Speed: 2.048 Mbps
• Operating Supply Voltage: 5 V

x = Don’t care
Initialization of the MT8985
On initialization or power up, the contents of the Connection Memory High can be in any state. This is a potentially
hazardous condition when multiple MT8985 ST-BUS outputs are tied together to form matrices, as these outputs
may conflict. The ODE pin should be held low on power up to keep all outputs in the high impedance condition.
BIT
4-3
2-0
7
6
MS1-MS0
STA2-0
NAME
ME
SM
Split Memory. When 1, all subsequent reads are from the Data Memory and writes are to the
Connection Memory Low, except when the Control Register is accessed again. The Memory Select
bits need to be set to specify the memory for the operations. When 0, the Memory Select bits specify
the memory for subsequent operations. In either case, the Stream Address Bits select the subsection
of the memory which is made available.
Message Enable. When 1, the contents of the Connection Memory Low are output on the Serial
Output streams except when in High Impedance. When 0, the Connection Memory bits for each
channel determine what is output.
Memory Select Bits. The memory select bits operate as follows:
Stream Address Bits 2-0. The number expressed in binary notation on these bits refers to the input
or output ST-BUS stream which corresponds to the subsection of memory made accessible for
subsequent operations.
SM
7
1-0 - Connection Memory Low
1-1 - Connection Memory High
0-0 - Not to be used
0-1 - Data Memory (read only from the CPU)
ME
6
Figure 4 - Control Register Bits
X
5
Zarlink Semiconductor Inc.
MT8985
MS1
4
8
MS0
3
DESCRIPTION
STA2
2
STA1
1
STA0
0
Data Sheet