MT8985AL Zarlink, MT8985AL Datasheet - Page 3

• Manufacturer Part Number: MT8985AL
• Description: Switch Fabric 256 x 256 16.384Mbps 5V 44-Pin MQFP Tray
• Manufacturer: Zarlink

Specifications of MT8985AL

• Package: 44MQFP
• Number Of Ports: 8
• Fabric Size: 256 x 256
• Switching Bandwidth: 16.384 Mbps
• Switch Core: Non-Blocking
• Port Speed: 2.048 Mbps
• Operating Supply Voltage: 5 V

Pin Description
13-18 15-17
22-29 25-27
31-38 35-39
DIP
2-9
40
10
11
12
19
20
21
30
39
40
1
19-21
29-33
41-43
6, 18,
Pin #
PLCC
7-11
3-5
28,
44
12
13
14
22
23
24
34
44
40
2
1
41-43
13-15
19-21
23-27
29-33
35-37
12,22
9-11
QFP
1-5
34,
17
44
40
16
18
28
38
39
44
6
7
8
D7-D0 Data Bus 7 to 0 (Bidirectional). These pins provide microprocessor access to data
Name
A0-A5 Address 0 to 5 (Inputs). These lines provide the address to MT8985 internal
STo7-
CSTo Control ST-BUS Output (Output). This output is a 2.048 Mb/s line which contains
STi0-
STo0
ODE Output Drive Enable (Input). This is an output enable for the STo0 to STo7 serial
DTA Data Acknowledgement (Open Drain Output). This active low output indicates that
STi7
R/W Read/Write (Input). This input controls the direction of the data bus lines (D0-D7)
V
C4i
V
NC
F0i
DS
CS
DD
SS
a data bus transfer is complete. A pull-up resistor is required at this output.
ST-BUS Input 0 to 7 (Inputs). Serial data input streams. These streams have 32
channels at data rates of 2.048 Mbit/s.
+5 Volt Power Supply rail.
Frame Pulse (Input): This input accepts and automatically identifies frame
synchronization signals formatted according to different backplane specifications
such as ST-BUS and GCI.
Clock (Input). 4.096 MHz serial clock for shifting data in and out of the data streams.
registers.
Data Strobe (Input). This is the input for the active high data strobe on the
microprocessor interface. This input operates with CS to enable the internal read and
write generation.
during a microprocessor access.
Chip Select (Input). Active low input enabling a microprocessor read or write of
control register or internal memories.
in the internal control register, connect memory high, connect memory low and data
memory.
Ground Rail.
ST-BUS Outputs 7 to 0 (Three-state Outputs). Serial data output streams. These
streams are composed of 32 channels at data rates of 2.048 Mbit/s.
outputs. If this input is low STo0-7 are high impedance. If this input is high each
channel may still be put into high impedance by software control.
256 bits per frame. The level of each bit is controlled by the contents of the CSTo bit
in the Connect Memory high locations.
No Connection.
Zarlink Semiconductor Inc.
MT8985
3
Description
Data Sheet