XC95288XL-10PQ208C Xilinx Inc, XC95288XL-10PQ208C Datasheet - Page 10

• Manufacturer Part Number: XC95288XL-10PQ208C
• Description: CPLD XC9500XL Family 6.4K Gates 288 Macro Cells 100MHz 0.35um (CMOS) Technology 3.3V 208-Pin PQFP
• Manufacturer: Xilinx Inc

Specifications of XC95288XL-10PQ208C

• Package: 208PQFP
• Family Name: XC9500XL
• Device System Gates: 6400
• Number Of Macro Cells: 288
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 168
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 100 MHz
• Number Of Product Terms Per Macro: 90
• Memory Type: Flash
• Operating Temperature: 0 to 70 °C
• Case: QFP

FastCONNECT II Switch Matrix
The FastCONNECT II Switch Matrix connects signals to the
FB inputs, as shown in
DS054 (v2.5) May 22, 2009
Product Specification
R
FastCONNECT II
Switch Matrix
Figure
9. All IOB outputs (corre-
(54)
(54)
Figure 9: FastCONNECT II Switch Matrix
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Function Block
Function Block
sponding to user pin inputs) and all FB outputs drive the
FastCONNECT II matrix. Any of these (up to a fan-in limit of
54) may be selected to drive each FB with a uniform delay.
XC9500XL High-Performance CPLD Family Data Sheet
D/T Q
D/T Q
18
18
I/O Block
I/O Block
DS054_09_042101
I/O
I/O
10