APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 157
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APA600-CQ208B
Manufacturer Part Number
APA600-CQ208B
Description
FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA600-CQ208B
Package
208CQFP
Family Name
ProASICPLUS
Device System Gates
600000
Number Of Registers
21504
Maximum Internal Frequency
180 MHz
Typical Operating Supply Voltage
2.5 V
Maximum Number Of User I/os
158
Ram Bits
129024
Re-programmability Support
Yes
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Number
Pin
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P5
P6
P7
P8
P9
R1
R2
R3
R4
R5
R6
R7
1152-Pin FBGA
APA1000
Function
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
V
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DDP
DDP
DDP
DDP
DD
DD
Number
Pin
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
R32
R33
R34
T10
R8
R9
T1
T2
T3
T4
T5
T6
T7
T8
T9
1152-Pin FBGA
APA1000
Function
V
V
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DDP
DDP
DD
DD
v5.9
Number
U10
U11
U12
U13
Pin
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
T24
T25
T26
T27
T28
T29
T30
T31
T32
T33
T34
U1
U2
U3
U4
U5
U6
U7
U8
U9
1152-Pin FBGA
I/O / GLMX1
APA1000
Function
I/O / GL1
NPECL1
AGND
V
GND
GND
GND
GND
GND
GND
GND
GND
V
GND
GND
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DDP
DD
DD
DD
ProASIC
Number
PLUS
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
U27
U28
U29
U30
U31
U32
U33
U34
V10
V11
V12
V13
V14
V15
Pin
V1
V2
V3
V4
V5
V6
V7
V8
V9
1152-Pin FBGA
Flash Family FPGAs
I/O / GLMX2
APA1000
Function
I/O / GL2
PPECL1 /
NPECL2
AGND
AVDD
Input
GND
GND
GND
GND
GND
GND
GND
GND
V
GND
GND
GND
GND
V
GND
GND
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
DD
3-73
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