SPD6729QCE Intel, SPD6729QCE Datasheet - Page 89

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SPD6729QCE

Manufacturer Part Number
SPD6729QCE
Description
PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
Manufacturer
Intel
Datasheet

Specifications of SPD6729QCE

Package
208MQFP
Operating Temperature
0 to 70 °C

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11.2.0.1
11.3
Datasheet
Register Name: Recovery Timing 0-1
Index: 3Ch, 3Fh
Recovery Prescalar Select
Bit
7
RW:00
Bits 5-0: Command Multiplier Value
This field indicates an integer value N
7-6) to control the length that a command is active.
Bits 7-6: Command Prescalar Select
This field chooses one of four prescalar values N
Command Multiplier Value (bits 5-0) to control the length that a command is active.
Recovery Timing 0-1
There are two separate Recover Timing registers, each with identical fields. These registers are
located at the following indexes:
The Recovery Timing register for each timer set controls how long a PCMCIA cycle’s command
(that is, -OE, -WE, -IORD, -IOWR; see
internal clock cycles.
The overall command recovery timing length R is programmed by selecting a 2-bit prescaling
value (bits 7-6 of this register) representing weights of 1, 16, 256, or 4096, and then selecting a
multiplier value (bits 5-0) to which that prescalar is multiplied to produce the overall command
recovery timing length according to the following formula:
The value of R, representing the number of clock cycles for command recovery, is then multiplied
by the clock period of the internal clock driving the PC card interface to determine the actual
command recovery time (see
discussion).
Bit
00
01
10
11
6
Index
3Ch
3Fh
N pres = 1
N pres = 16
N pres = 256
N pres = 4096
Bit
(Socket A)Recovery Timing
Recovery Timing 0
Recovery Timing 1
R = (N
5
pres
“PCMCIA Bus Timing Calculations” on page 101
N
Bit
val
4
)
val
1
Table
from 0 to 63; it is combined with a prescalar value (bits
PCI-to-PC Card (PCMCIA) Controller — PD6729
Recovery Multiplier Value
Bit
2) recovery time will be, in terms of the number of
pres
3
RW:000000
that are combined with the value of the
Bit
2
Register Compatibility Type: 365
Bit
1
Register Per: socket
for further
Bit
0
89

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