SPD6729QCE Intel, SPD6729QCE Datasheet - Page 24

• Manufacturer Part Number: SPD6729QCE
• Description: PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
• Manufacturer: Intel

Specifications of SPD6729QCE

• Package: 208MQFP
• Operating Temperature: 0 to 70 °C

PD6729 — PCI-to-PC Card (PCMCIA) Controller
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Enable
Start Address
End Address
Offset Address
Upper Address
Timing
Register Access Setting
Write Protect
Enable
Start Address
End Address
Offset Address
Auto Size
Data Size
Timing
Memory Window Option
I/O Window Option
Having five memory windows per socket allows a memory-type card to be accessed through four
memory windows programmed for common memory access, (allowing PC-type expanded-
memory-style management), leaving the fifth memory window available to be programmed to
access the card’s attribute memory without disrupting the common memory in use.
Each memory window has several programming options, including:
Each I/O window also has several programming options, including:
Each of the five memory windows can be individually enabled. Disabled windows are not
responded to.
This is the start address of the memory window within the selected 16-Mbyte page of PCI
memory. The start address can be programmed to reside on any 4-Kbyte boundary within the
programmed page of PCI memory.
This is the end address of the memory window within the selected 16-Mbyte page of PCI
memory. The end address can be programmed to reside on any 4-Kbyte boundary within the
programmed page of PCI memory. Only memory accesses between the start and end address
are responded to.
The offset address is added to the PCI address to determine the address for accessing the
PCMCIA card. This allows the addresses in the PCMCIA address space to be different from the
PCI address space.
The upper memory address specifies a 16-Mbyte page of PCI memory.
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register
sets: Timer Set 0 or Timer Set 1.
The -REG pin can be enabled on a per-window basis so that any of the windows can be used for
accessing attribute memory.
If the window is programmed to be write-protected, then writes to the memory window are
ignored (reads are still performed normally).
Each of the two I/O windows can be individually enabled.
The start address of the window is programmable on single-byte boundaries from 0 to 64
Kbytes.
The end address of the window is also programmable on single-byte boundaries from 0 to 64
Kbytes.
The offset address is added to the PCI address to determine the address for accessing the
PCMCIA card.
The size of accesses can be set automatically, based on the PCMCIA -IOIS16 signal.
The size of accesses can be set manually to either 8 or 16 bits, overriding the Auto Size option.
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register
sets: Timer Set 0 or Timer Set 1.
Description
Description
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