H57V2562GTR-75C HYNIX SEMICONDUCTOR, H57V2562GTR-75C Datasheet - Page 20

• Manufacturer Part Number: H57V2562GTR-75C
• Description: 58T1903
• Manufacturer: HYNIX SEMICONDUCTOR

Specifications of H57V2562GTR-75C

• Memory Type: SDRAM
• Memory Configuration: 16M X 16
• Access Time: 6ns
• Interface Type: LVTTL
• Memory Case Style: TSOPII
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Memory Size: 256 Mbit
• Rohs Compliant: Yes

Note :
1. H: Logic High, L: Logic Low, X: Don
2. All entries assume that CKE was active during the preceding clock cycle.
3. If both banks are idle and CKE is inactive, then in power down cycle
4. Illegal to bank in specified states. Function may be legal in the bank indicated by Bank Address,
5. If both banks are idle and CKE is inactive, then Self Refresh mode.
6. Illegal if t
7. Illegal if t
8. Must satisfy burst interrupt condition.
9. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
10. Must mask preceding data which don
11. Illegal if t
12. Illegal for single bank, but legal for other banks in multi-bank devices.
13. Illegal for all banks.
Rev 1.0 / Dec. 2010
depending on the state of that bank.
RCD
RAS
RRD
is not satisfied.
is not satisfied.
is not satisfied
'
t care, BA: Bank Address, AP: Auto Precharge.
'
t satisfy t
DPL
.
Synchronous DRAM Memory 256Mbit
H57V2562GTR Series
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