PDIUSBD12D NXP Semiconductors, PDIUSBD12D Datasheet - Page 14

• Manufacturer Part Number: PDIUSBD12D
• Description: USB Interface IC USB INTRFC W/PARL BUS
• Manufacturer: NXP Semiconductors

Specifications of PDIUSBD12D

• Operating Supply Voltage: 4 V to 5.5 V
• Lead Free Status / Rohs Status: Details
• Other names: PDIUSBD12D,112

Philips Semiconductors
PDIUSBD12_9
Product data sheet
11.2.2 Set Endpoint Enable
11.2.3 Set Mode
Code (Hex) — D8
Transaction — write 1 B
The generic or isochronous endpoints can only be enabled when the function is enabled
using the Set Address/Enable command.
Code (Hex) — F3
Transaction — write 2 B
The Set Mode command is followed by two data writes. The first byte contains
configuration bits. The second byte is the clock division factor byte.
Fig 5. Set Endpoint Enable command: bit allocation
Fig 6. Set Mode command, configuration byte: bit allocation
GENERIC OR ISOCHRONOUS ENDPOINTS: Logic 1 indicates that generic or isochronous
endpoints are enabled.
For bit allocation, see
X X
7 6 5 4 3 2
Rev. 09 — 11 May 2006
7 6 5 4 3 2
0
X X
0
Table
0 0
X X
5.
1
X
1
1
0
0
1
1
0
0
Power-on value
GENERIC/ISOCHRONOUS ENDPOINTS
reserved; write 0
USB peripheral controller with parallel bus
Power-on value
reserved
NO LAZYCLOCK
CLOCK RUNNING
INTERRUPT MODE
SoftConnect
reserved; write 0
ENDPOINT CONFIGURATION
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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PDIUSBD12
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