UDA1384H NXP Semiconductors, UDA1384H Datasheet - Page 39

Encoders, Decoders, Multiplexers & Demultiplexers LO CST MULTICH CODEC

UDA1384H

Manufacturer Part Number
UDA1384H
Description
Encoders, Decoders, Multiplexers & Demultiplexers LO CST MULTICH CODEC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1384H

Maximum Operating Temperature
+ 85 C
Package / Case
SOT-307
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
 Details
Other names
UDA1384H/N1,557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1384H
Quantity:
2 000
Part Number:
UDA1384H/N1,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
UDA1384H/N1,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
9397 750 14366
Product data sheet
11.13 Supplemental settings 1
11.14 Supplemental settings 2
Table 58:
Table 59:
Table 60:
Table 61:
Bit
15 to 8
7
6 to 0
Bit
15 to 7
6 to 4
3 to 2
1
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Symbol
-
PDT
-
Symbol
-
DITH[2:0]
-
VMTP
Supplemental settings 1 register (address 30h) bit allocation
Description of supplemental settings 1 register bits
Supplemental settings 2 register (address 31h) bit allocation
Description of supplemental settings 2 register bits
PDT
15
15
0
7
0
0
7
0
-
-
-
DITH2
Rev. 02 — 17 January 2005
14
14
0
6
0
0
6
0
-
-
-
Description
default 0000 0000
Power down time. Bit PDT selects the time of the SDAC power-down
sequence.
default 000 0000
Description
default 0000 0000 0
DAC dither control. A 3-bit value to control the dithering of the SDAC.
Default 000. See
default 00
Voice mute period control. Bit VMPT selects the voice ADC mute
period at power-up.
1 = 1024/f
0 = 512/f
1 = mute for 1024 samples (1024/f
0 = mute for 2048 samples (2048/f
DITH1
13
13
0
5
0
0
5
0
-
-
-
s
s
seconds (default)
seconds
Table
DITH0
read and write
read and write
read and write
read and write
12
12
0
4
0
0
4
0
-
-
-
62.
Multichannel audio coder-decoder
11
11
0
3
0
0
3
0
-
-
-
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
s
s
)
; default)
10
10
0
2
0
0
2
0
-
-
-
-
UDA1384
VMTP
9
0
1
0
9
0
1
0
-
-
-
PDLNA
39 of 55
8
0
0
0
8
0
0
0
-
-
-

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