74LVC32AD NXP Semiconductors, 74LVC32AD Datasheet - Page 4

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT OR GATE

74LVC32AD

Manufacturer Part Number
74LVC32AD
Description
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT OR GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC32AD

Product
OR
Logic Family
LVC
Number Of Gates
Quad
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
2.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-108
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LVC32AD,112

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Philips Semiconductors
2003 Jul 16
handbook, halfpage
handbook, halfpage
Quad 2-input OR gate
Fig.1 Pin configuration SO14 and (T)SSOP14.
GND
1A
1B
1Y
2A
2B
2Y
Fig.3 Logic symbol.
10
12
13
1
2
4
5
9
1
2
3
4
5
6
7
1A
1B
2A
2B
3A
3B
4A
4B
32
MNA240
MNA242
1Y
2Y
3Y
4Y
14
13
12
11
10
9
8
11
3
6
8
V CC
4B
4A
4Y
3B
3A
3Y
4
handbook, halfpage
handbook, halfpage
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
1B
1Y
2A
2B
2Y
Fig.4 Logic symbol (IEEE/IEC).
Top view
2
3
4
5
6
10
13
12
1
2
4
5
9
GND
1A
7
1
GND
MNA243
1
1
1
1
V CC
(1)
3Y
14
8
11
Product specification
MNB060
3
6
8
74LVC32A
13
12
11
10
9
4B
4A
4Y
3B
3A

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