74HC00D NXP Semiconductors, 74HC00D Datasheet - Page 2

Gates (AND / NAND / OR / NOR) QUAD 2-IN NAND GATE

74HC00D

Manufacturer Part Number
74HC00D
Description
Gates (AND / NAND / OR / NOR) QUAD 2-IN NAND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC00D

Product
NAND
Logic Family
74HC
Number Of Gates
Quad
Number Of Lines (input / Output)
8 / 4
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
7 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-108
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74HC00D,652

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NXP Semiconductors
4. Functional diagram
5. Pinning information
Table 2.
74HC_HCT00
Product data sheet
Symbol
1A to 4A
1B to 4B
Fig 1.
Fig 4.
Logic symbol
Pin configuration DIP14, SO14 and (T)SSOP14
10
12
13
GND
Pin description
1
2
4
5
9
1A
1B
1Y
2A
2B
2Y
1A
1B
2A
2B
3A
3B
4A
4B
1
2
3
4
5
6
7
5.1 Pinning
5.2 Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
mna212
1Y
2Y
3Y
4Y
74HCT00
74HC00
11
3
6
8
001aal323
Description
data input
data input
All information provided in this document is subject to legal disclaimers.
Fig 2.
14
13
12
11
10
9
8
V
4B
4A
4Y
3B
3A
3Y
CC
Rev. 5 — 25 November 2010
IEC logic symbol
10
12
13
1
2
4
5
9
mna246
&
&
&
&
Fig 5.
3
6
8
11
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN14
index area
terminal 1
74HC00; 74HCT00
1B
1Y
2A
2B
2Y
Fig 3.
Transparent top view
2
3
4
5
6
A
B
74HCT00
74HC00
GND
Logic diagram (one gate)
Quad 2-input NAND gate
(1)
001aal324
13
12
11
10
9
© NXP B.V. 2010. All rights reserved.
4B
4A
4Y
3B
3A
mna211
Y
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