DS90C3201VS National Semiconductor, DS90C3201VS Datasheet - Page 16

• Manufacturer Part Number: DS90C3201VS
• Manufacturer: National Semiconductor

Specifications of DS90C3201VS

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Not Compliant

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Two-Wire Serial Communication
Interface Description
The DS90C3201 operates as a slave on the Serial Bus, so
the S2CLK line is an input (no clock is generated by the
DS90C3201)
DS90C3201 has a fixed 7bit slave address. The address is
not user configurable in anyway.
A zero in front of the register address is required. For exam-
ple, to access register 0x0Fh, “0F” is the correct way of
accessing the register.
COMMUNICATING WITH THE DS90C3201 CONTROL
REGISTERS
There are 32 data registers (one byte each) in the
DS90C3201, and can be accessed through 32 addresses. All
registers are predefined as read only or read and write. The
DS90C3201 slave state machine does not require an internal
clock and it supports only byte read and write. Page mode is
not supported. The 7-bit binary address is 0111111 All seven
bits are hardwired internally.
The master must generate a Start by sending the 7-bit slave
address plus a 0 first, and wait for acknowledge from
DS90C3201. When DS90C3201 acknowledges (the 1st ACK)
that the master is calling, the master then sends the data reg-
ister address byte and waits for acknowledge from the slave.
When the slave acknowledges (the 2nd ACK), the master re-
peats the “Start” by sending the 7-bit slave address plus a 1
(indicating that READ operation is in progress) and waits for
The master must generate a “Start” by sending the 7-bit slave
address plus a 0 and wait for acknowledge from DS90C3201.
When DS90C3201 acknowledges (the 1st ACK) that the mas-
ter is calling, the master then sends the data register address
byte and waits for acknowledge from the slave. When the
and
the
S2DAT
line
is
bi-directional.
FIGURE 14. Byte Read
FIGURE 15. Byte Write
16
Reading the DS90C3201 can take place either of three ways:
1.
2.
3.
The data byte has the most significant bit first. At the end of
a read, the DS90C3201 can accept either Acknowledge or No
Acknowledge from the Master (No Acknowledge is typically
used as a signal for the slave that the Master has read its last
byte).
acknowledge from DS90C3201. After the slave responds (the
3rd ACK), the slave sends the data to the bus and waits for
acknowledge from the master. When the master acknowl-
edges (the 4th ACK), it generates a “Stop”. This completes
the “ READ”.
A Write to the DS90C3201 will always include the slave ad-
dress, data register address byte, and a data byte.
slave acknowledges (the 2nd ACK), the master sends the
data byte and wait for acknowledge from the slave. When the
slave acknowledges (the 3rd ACK), the master generates a “
Stop”. This completes the “WRITE”.
If the location latched in the data register addresses is
correct, then the read can simply consist of a slave
address byte, followed by retrieving the data byte.
If the data register address needs to be set, then a slave
address byte, data register address will be sent first, then
the master will repeat start, send the slave address byte
and data byte to accomplish a read.
When performing continuous read operations, another
write (or read) instruction in between reads needs to be
completed in order for the two-wire serial interface
module to read repeatedly.
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