ATA5811-PLQX Atmel, ATA5811-PLQX Datasheet - Page 55

• Manufacturer Part Number: ATA5811-PLQX
• Manufacturer: Atmel

Specifications of ATA5811-PLQX

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Lead Free Status / Rohs Status: Compliant

Receiving Mode
Figure 47. Receiving Mode (TMODE = 1)
4689B–RKE–04/04
SDO_TMDO
Demod_Out
Bit check ok
'0' '0' '0' '0' '0' '0' '0' '0' '0' '1'
Bit-check mode
Preburst
In the presence of a valid transmitter signal, T
that signal, f
results in a longer period for T
burst T
If the Bit-check was successful for all bits specified by N
to receiving mode. To activate a connected microcontroller, the bits VSOUT_EN and
CLK_ON in control register 3 are set to 1. An interrupt is issued at pin IRQ if the control
bits T_MODE = 0 and P_MODE = 0.
If the transparent mode is active (T_MODE = 1) and the level on pin CS is low (no data
transfer via the serial interface), the RX data stream is available on pin SDO_TMDO
(Figure 47).
If the transparent mode is inactive (T_MODE = 0), the received data stream is buffered
in the TX/RX data buffer (see Figure 48 on page 56). The TX/RX data buffer is only
usable for Manchester and Bi-phase coded signals. It is permanently possible to trans-
fer the data from the data buffer via the 4-wire serial interface to a microcontroller (see
Figure 33 on page 45).
Buffering of the data stream:
After a successful Bit-check, the transceiver switches from Bit-check mode to receiving
mode. In receiving mode the TX/RX data buffer control logic is active and examines the
incoming data stream. This is done, like in the Bit-check, by subsequent time frame
checks where the distance between two edges is continuously compared to a program-
mable time window as illustrated in Figure 48 on page 56, only two distances between
two edges in Manchester and Bi-phase coded signals are valid (T and 2T).
The limits for T are the same as used for the Bit-check. They can be programmed in
control register 5 and 6 (Lim_min, Lim_max).
The limits for 2T are calculated as follows:
Lower limit of 2T:
Upper limit of 2T:
If the result of Lim_min_2T or Lim_max_2T is not an integer value, it will be round up.
Lim_min_2T
T
Lim_max_2T
T
Lim_min_2T
Lim_max_2T
Preburst
=
=
=
Sig
.
=
Start-
Lim_min_2T
bit
Lim_max_2T - 1
, and the count of the bits, N
Lim_min Lim_max
Lim_min Lim_max
'0'
'1'
'0' '0' '0' '0' '0' '1' '1' '1' '1' '0'
Byte 1
+
+
ATA5811/ATA5812 [Preliminary]
T
XDCLK
Bit-check
Receiving mode
T
XDCLK
–
+
Lim_max Lim_min
Lim_max Lim_min
requiring a higher value for the transmitter pre-
Byte 2
Bit-check
–
–
Bit-check
'0' '1' '1' '0' '1' '0' '1' '1' '0' '0'
. A higher value for N
is dependent on the frequency of
Bit-check
2
2
, the transceiver switches
Byte 3
Bit-check
thereby
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