ATA5811-PLQX Atmel, ATA5811-PLQX Datasheet - Page 54
ATA5811-PLQX
Manufacturer Part Number
ATA5811-PLQX
Description
Manufacturer
Atmel
Datasheet
1.ATA5811-PLQX.pdf
(90 pages)
Specifications of ATA5811-PLQX
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Lead Free Status / Rohs Status
Compliant
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Figure 45. Timing Diagram for Failed Bit-check (Condition CV_Lim < Lim_min)
Figure 46. Timing Diagram for Failed Bit-check (Condition: CV_Lim
Duration of the Bit-check
54
Bit-check counter
Bit-check counter
ATA5811/ATA5812 [Preliminary]
(Lim_min = 14, Lim_max = 24)
RX_ACTIVE
RX_ACTIVE
Demod_Out
(Lim_min = 14, Lim_max = 24)
Demod_Out
Bit check
Bit check
T
T
Start-up mode
Start-up mode
Startup_Sig_Proc
Startup_Sig_Proc
0
0
If no transmitter is present during the Bit-check, the output of the ASK/FSK demodulator
delivers random signals. The Bit-check is a statistical process and T
each check. Therefore, an average value for T
istics. T
rate range causes a lower value for T
RX polling mode.
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
Bit check failed (CV_Lim < Lim_min)
Bit-check
Bit-check mode
T
depends on the selected baud rate range and on T
Bit-check
Bit-check mode
1/2 Bit
Bit check failed (CV_Lim >= Lim_min)
T
Bit-check
1/2 Bit
131415161718192021222324
Lim_max)
Bit-check
resulting in a lower current consumption in
Bit-check
Sleep mode
is given in the electrical character-
T
Sleep
0
Sleep mode
T
0
Sleep
XDCLK
Bit-check
. A higher baud-
4689B–RKE–04/04
varies for
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