ATA5824-PLQW 80 Atmel, ATA5824-PLQW 80 Datasheet - Page 68
![](/photos/40/57/405769/48pin_qfn_sml.jpg)
ATA5824-PLQW 80
Manufacturer Part Number
ATA5824-PLQW 80
Description
Manufacturer
Atmel
Datasheet
1.ATA5824-PLQW_80.pdf
(98 pages)
Specifications of ATA5824-PLQW 80
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Operating Supply Voltage (typ)
5V
Lead Free Status / Rohs Status
Compliant
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Figure 14-14. Flow FD mode (Master)
68
ATA5823/ATA5824
Write Control Register 1
OPM2, OPM1, OPM0:
Write Control Register 8
FE_MODE:
PWSELECT:
PWSET0 to PWSET4:
Write Control Register 7
POUT_SELECT, POUT_DATA:
TX0 to TX5:
Write Control Register 6
Baud1, Baud0:
Lim_max0 to Lim_max5:
Write Control Register 5
Bitchk1, Bitchk0:
Lim_min0 to Lim_min5:
Write Control Register 4
ASK/_NFSK:
Sleep0 to Sleep4:
XSleep:
XLim:
Write Control Register 3
FR7, FR8, FR9:
CLK_EN, CLK_ON:
Write Control Register 2
FR0 to FR6:
P_MODE:
Write Control Register 1
IR1, IR0:
PLL_MODE:
FS:
OPM2, OPM1, OPM0:
T_MODE:
(Preburst startbit synchronization pattern, data block)
N
Read TX/ RX Buffer
Write TX/ RX Buffer
(max. 16 byte)
Pin IRQ = 1 ?
Set FE_MODE = 1
Don’t care
Adjust SETPWR to reduce the
output power
Application defined
Don’t care
BAUD1 = 0, BAUD0 = 1
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Adjust f
Application defined
Adjust f
Don’t care
Don’t care
Application defined
Select operating frequency
Set OPM2 = 1, OPM1 = 1
OPM0 = 1
T_MODE = 0
Y
RF
RF
Set IDLE
T
Startup_PLL_fd
Start-up FD Mode (Master)
Idle Mode
Idle Mode
FD Mode
(Slave)
= 798.5
T
DCLK
4829D–RKE–06/06
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