ELANSC400-66AI AMD (ADVANCED MICRO DEVICES), ELANSC400-66AI Datasheet - Page 119

• Manufacturer Part Number: ELANSC400-66AI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC400-66AI

• Cpu Family: Elan
• Device Core Size: 16/32Bit
• Frequency (max): 66MHz
• Interface Type: ISA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 292
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

Notes:
1. T is the nominal period of the selected clock: in Standard mode, this is the 125-ns ISA bus clock; in Enhanced mode, it is the
2. S determines the setup time as programmed into the Setup Timing Register selected from one of four timing sets. Its value
3. C determines the command active time as programmed into the Command Timing Register selected from one of four timing
4. R determines the recovery time as programmed into the Recovery Timing Register selected from one of four timing sets. Its
30-ns local bus clock.
can be programmed to a range of 1 to 4096 • 63.
sets. Its value can be programmed to a range of 1 to 4096 • 63.
value can be programmed to a range of 1 to 4096 • 63.
Symbol
t13a
t13b
t17a
t17b
t18a
t18b
t10
t11
t12
t14
t15
t16
t1
t2
t3
t4
t5
t6
t7
t8
t9
Parameter Description
REG_x, SA setup to command active
Command pulse width
SA hold and write data valid from command inactive
WAIT_AB Active from command active
Command hold from WAIT_AB inactive
SD setup before read command inactive
SD valid from read command inactive
SD valid from WAIT_AB inactive
IOIS16 setup before command inactive
MCEH_x delay from IOIS16 active
IOIS16 delay from valid SA
Setup, DACK assertion to DMA I/O command active
Pulse width, DMA I/O write command
Pulse width, DMA I/O read command
Hold, DMA I/O command inactive to DACK inactive
DMA I/O command setup to TC active
TC pulse width
SD setup to DMA IOW active
SD valid delay from DMA IOR active
SD hold from DMA IOW inactive
SD hold from DMA IOR inactive
Table 42. PC Card Cycles—ÉlanSC400 Microcontroller Only
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Notes
1, 3
1
1 , 2
1, 3
,
1
1
1
1
1
4
33-MHz External Bus
2T+10
3T+10
ST-10
CT-10
RT-10
T+10
T-10
-241
Min
145
220
700
2T
60
15
62
0
0
0
(C-2)•T-10
Max
100
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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