S29AL016D90TFI02 Spansion Inc., S29AL016D90TFI02 Datasheet - Page 15

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S29AL016D90TFI02

Manufacturer Part Number
S29AL016D90TFI02
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29AL016D90TFI02

Cell Type
NOR
Density
16Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
35mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

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7.2
7.3
7.4
February 27, 2009 S29AL016D_00_A8
Requirements for Reading Array Data
Writing Commands/Command Sequences
Program and Erase Operation Status
To read array data from the outputs, the system must drive the CE# and OE# pins to V
control and selects the device. OE# is the output control and gates array data to the output pins. WE# should
remain at V
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory content occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses
on the device address inputs produce valid data on the device data outputs. The device remains enabled for
read access until the command register contents are altered.
See
timing specifications and to
on page 37
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# to V
For program operations, the BYTE# pin determines whether the device accepts program data in bytes or
words. See
The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four.
Byte Program Command Sequence on page 26
standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 7.3 on page 18
the address bits required to uniquely select a sector. The
erasing a sector or the entire chip, or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the autoselect mode. The
system can then read autoselect codes from the internal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this mode. Refer to
Autoselect Command Sequence on page 25
I
Characteristics on page 40
During an erase or program operation, the system may check the status of the operation by reading the
status bits on DQ7–DQ0. Standard read cycle timings and I
Operation Status on page 31
CC2
Reading Array Data on page 25
in
DC Characteristics on page 37
IH
represents the active current specification for reading array data.
Word/Byte Configuration on page 14
. The BYTE# pin determines whether the device outputs array data in words or bytes.
indicate the address space that each sector occupies. A “sector address” consists of
D a t a
contains timing specification tables and timing diagrams for write operations.
Figure 17.1 on page 40
for more information, and to
S h e e t
for more information. Refer to the AC
represents the active current specification for the write mode.
S29AL016D
for more information.
has details on programming data to the device using both
for more information.
for the timing diagram. I
Command Definitions on page 25
AC Characteristics on page 40
CC
IL
read specifications apply. Refer to
, and OE# to V
Autoselect Mode on page 19
Read Operations on page 40
CC1
IH
Table 7.2 on page 17
in
.
DC Characteristics
IL
. CE# is the power
for timing diagrams.
has details on
Write
Word/
AC
and
and
for
15

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