OQ2536HP NXP Semiconductors, OQ2536HP Datasheet - Page 2

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OQ2536HP

Manufacturer Part Number
OQ2536HP
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of OQ2536HP

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
100
Mounting
Surface Mount
Lead Free Status / Rohs Status
Supplier Unconfirmed
Philips Semiconductors
FEATURES
ORDERING INFORMATION
BLOCK DIAGRAM
1998 Mar 10
handbook, full pagewidth
OQ2536HP
Normal and loop (test) modes
1.2 V GTL (Gunning Transceiver Logic) level compatible
data and clock outputs (low speed interface)
Differential CML (Current-Mode Logic) data and clock
inputs
High input sensitivity (100 mV for the high speed inputs)
Boundary Scan Test (BST) at low speed interface, in
accordance with “IEEE Std 1149.1-1990”
Low power dissipation (typically 1.45 W).
SDH/SONET STM16/OC48 demultiplexer
(1) See Chapter “Pinning” for D0 to D31 pin numbers.
(2)
NUMBER
TYPE
Pins 1, 8, 17, 22, 25, 29, 33, 35, 40 to 50, 52, 55, 58, 61, 64, 67, 78, 82, 91 and 96.
DLOOPQ
CLOOPQ
DLOOP
CLOOP
DINQ
CINQ
DIOA
DIOC
DIN
CIN
HLQFP100
NAME
32
31
65
66
60
59
GND
54
53
56
57
(2)
29
V DD
26, 27, 28,
76, 77
5
plastic heat-dissipating low profile quad flat package; 100 leads; body
14
2.5 Gbits/s
2.5 GHz
14
V CC2
7
13, 14, 36,
37, 63, 85,
86
1.4 mm
DIVIDE BY 4
V EE
Fig.1 Block diagram.
1 : 4 DMUX
5
OQ2536HP
11, 38, 39,
62, 88
622 MHz
V CC1
2
DESCRIPTION
74
REFERENCE 2
DESCRIPTION
The OQ2536HP is a 32-channel demultiplexer intended
for use in STM16/OC48 applications. It demultiplexes a
single 2.5 Gbits/s input channel to 32
channels. The data and clock outputs on the low speed
interface are GTL compatible, while the high speed data
and clock inputs are CML compatible.
Mbits/s
PACKAGE
BAND GAP
4
622
BGCAP2
34
DIVIDE BY 8
1 : 8 DMUX
4
REFERENCE 1
78 MHz
BAND GAP
BGCAP1
51
REFC
73
(1)
68
69
70
72
71
12
75
Product specification
Mbits/s
OQ2536HP
MGK346
78
TRST
TMS
TCK
TDI
TDO
CDIV
ENL
78 Mbits/s output
D31
D0
to
SOT470-1
VERSION

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