CY7C0831AV-133BBI Cypress Semiconductor Corp, CY7C0831AV-133BBI Datasheet - Page 27

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CY7C0831AV-133BBI

Manufacturer Part Number
CY7C0831AV-133BBI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C0831AV-133BBI

Density
2Mb
Access Time (max)
4.4ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
133MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
FBGA
Operating Temp Range
-40C to 85C
Number Of Ports
2
Supply Current
300mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Word Size
18b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C0831AV-133BBI
Manufacturer:
CYPRESS
Quantity:
300
Part Number:
CY7C0831AV-133BBI
Manufacturer:
CYPRESS
Quantity:
1
Part Number:
CY7C0831AV-133BBI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document History Page
Document #: 38-06059 Rev. *S
Document Title: CY7C0837AV/CY7C0830AV/CY7C0831AV/CY7C0832AV/CY7C0832BV/CY7C0833AV, FLEx18™ 3.3V
64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM
Document Number: 38-06059
Rev.
*M
*A
*B
*C
*D
*E
*G
*H
*K
*N
*O
*P
*Q
*R
*S
*F
*L
**
*J
*I
ECN No.
2544945
2668478
122307
123636
126053
129443
231993
231813
330561
375198
391525
414109
113741
114704
115336
311054
111473
111942
329111
461113
VKN/AESA
VKN/PYRS
Orig. of
Change
WWZ
DSG
RYQ
RUY
KRE
KRE
KRE
KRE
SPN
RAZ
YDT
SPN
YDT
SPN
YDT
JFU
RBI
LIJ
Submission
SEE ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
07/29/08
02/04/09
11/27/01
12/21/01
04/02/02
04/24/02
07/01/02
12/27/02
08/11/03
11/03/03
1/27/03
Date
Change from Spec number: 38-01056 to 38-06059
Updated capacitance values
Updated switching parameters and I
Updated “Read-to-Write-to-Read (OE Controlled)” waveform
Revised static discharge voltage
Revised footnote regarding I
Updated I
Updated ESD voltage
Corrected 0853 pins L3 and L12
Added discussion of Pause/Restart for JTAG boundary scan
Revised speed offerings for all densities
Power up requirements added to Maximum Ratings Information
Revise t
Separated out 4M and 9M data sheets
Updated I
Updated I
Removed “A particular port can write to a certain location while another port is
reading that location.” from Functional Description.
Removed x36 devices (CY7C0852/CY7C0851) from this datasheet. Added
0.5M, 1M and 9M x18 devices to it. Changed title to FLEx18 3.3V
32K/64K/128K/256K/512K x18 Synchronous Dual-Port RAM. Changed
datasheet to accommodate the removals and additions. Removed general
JTAG description. Updated JTAG ID codes for all devices. Added 144FBGA
package for all devices. Updated selection guide table and moved to the front
page. Updated block diagram to reflect x18 configuration. Added preliminary
status back due to the addition of the new devices.
Minor Change: Correct the revision indicated on the footer.
Updated Marketing part numbers
Updated tRSF
Added Byte Select Operation Table
Removed Preliminary status
Added I
Changed t
Updated Counter reset section to reflect what is loaded into the mirror register
Corrected Ordering Codes for 0831 devices in the 133 Mhz speed bin.
Added CY7C0833AV-133BBI.
Changed VDDIO to VDD (typo)
Added lead(Pb)-free parts
Corrected typo in DC table
Updated Template. Updated ordering information
Added CY7C0832BV part
Added footnote #1
Updated Ordering information table
SB5
cd2
sb
sb
sb
RSCNTINT
, t
values
and I
and I
OE
, t
CC
CC
OHZ
values
values
to 10ns
, t
CKHZ
Description of Change
, t
SB3
CKLZ
CY7C0832BV, CY7C0833AV
CY7C0837AV, CY7C0830AV
CY7C0831AV, CY7C0832AV
for the CY7C0853V to 4.7 ns
SB3
Page 27 of 28
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