AM29PL160CB-90SI AMD (ADVANCED MICRO DEVICES), AM29PL160CB-90SI Datasheet
AM29PL160CB-90SI
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AM29PL160CB-90SI Summary of contents
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... S29GL-A MirrorBit S29GL064A, S29GL032A, and S29GL016A 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology Data Sheet This product family has been retired and is not recommended for designs. For new and current designs, the S29AL016J, S29GL032N, and S29GL064N supersede S29GL016A ,S29GL032A, and S29GL064A respectively ...
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Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all ...
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... Erase Suspend & Resume: read/program other sectors before an erase operation is completed – Data# polling & toggle bits provide status – CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices – Unlock Bypass Program command reduces overall multiple-word ...
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... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses are stable for a specified period of time ...
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... Output Disable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8 Autoselect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 7.9 Sector Group Protection and Unprotection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 7.10 Temporary Sector Group Unprotect 7.11 Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 7.12 Write Protect (WP 7.13 Hardware Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8. Common Flash Memory Interface (CFI Command Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.1 Reading Array Data ...
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DQ3: Sector Erase Timer ...
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Figures Figure 3.1 48-Pin Standard TSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Tables Table 1.1 S29GL064A, S29GL032A, S29GL016A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Product Selector Guide Part Number Speed Option Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page Access Time (ns) Max. OE# Access Time (ns) 2. Block Diagram RY/BY RESET# WE# State Control WP#/ACC ...
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... Connection Diagrams 3.1 Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. A15 A14 A13 ...
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NC on S29GL032A A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE# 13 RESET# 14 A21 15 WP#/ACC 16 RY/BY# 17 A18 18 A17 ...
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Notes 1. Ball D8 and Ball F1 are NC on S29GL064A (models R3, R4) and S29GL016A (Models 01, 02, R1, R2). 2. Ball S29GL064A (model R5). 3. Ball S29GL032A and S29GL016A. 4. ...
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Note MCP-compatible Connection Diagram for cellular handsets only. May 21, 2008 S29GL-A_00_A12 Figure 3.4 56-Ball Fine-Pitch Ball Grid Array 56-Ball Fine-Pitch Ball Grid Array Top View, Balls Facing Down A2 A3 ...
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Notes 1. Ball S29GL064A (model R5 Ball S29GL032A and S29GL016A. 3. Ball S29GL016A Figure 3.5 48-ball ...
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Pin Descriptions A21–A0 22 Address inputs A20–A0 21 Address inputs A19–A0 20 Address inputs DQ7–DQ0 8 Data inputs/outputs DQ14–DQ0 15 Data inputs/outputs DQ15/A-1 DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# Chip Enable input OE# ...
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Logic Symbol–S29GL064A (Models R3, R4) 5.3 Logic Symbol–S29GL064A (Model R5) 5.4 Logic Symbol–S29GL064A (Models R6, R7 A21–A0 DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# BYTE# RY/BY# 22 A21–A0 ...
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Logic Symbol–S29GL032A (Models R1, R2) 5.6 Logic Symbol–S29GL032A (Models R3, R4) 5.7 Logic Symbol–S29GL032A (Models W3, W4) May 21, 2008 S29GL-A_00_A12 A20–A0 DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# ...
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Logic Symbol–S29GL016A (Models R1, R2) 5.9 Logic Symbol–S29GL016A (Models W1, W2 A19–A0 DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# BYTE# RY/BY# 20 A19–A0 DQ15–DQ0 CE# OE# WE# WP#/ACC ...
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... S29GL016A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL016A 10 T Device Number/Description S29GL016A 3.0 Volt-only, 16 Megabit Page-Mode Flash Memory Manufactured on 200 nm MirrorBit Device Speed Number Option 90, 10 S29GL016A 10 ...
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... Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL032A 90 T Device Number/Description S29GL032A 32 Megabit Page-Mode Flash Memory Manufactured using 200 nm MirrorBit Program, and Erase S29GL032A Valid Combinations Device Speed Number Option ...
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... S29GL064A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL064A 90 T Device Number/Description S29GL064A, 64 Megabit Page-Mode Flash Memory Manufactured using 200 nm MirrorBit Program, and Erase Device Speed Number Option S29GL064A ...
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Device Bus Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is a latch ...
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Word/Byte Configuration The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE# pin is set at logic 1, the device is in word configuration, DQ0–DQ15 are active and controlled ...
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... DC Characteristics on page 70 7.5 Automatic Sleep Mode The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables this mode when addresses remain stable for t CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. Refer to ...
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... Current is reduced for the duration of the RESET# pulse. When RESET# is held at V draws CMOS standby current (I greater. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firmware from the Flash memory. Refer to the tables in for the timing diagram ...
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Table 7.3 S29GL016A (Model R2, W2) Bottom Boot Sector Addresses Sector Size (KB/ 8-bit Address Sector A19–A12 Kwords) Range SA0 000000000 8/4 000000h–001FFFh SA1 000000001 8/4 002000h–003FFFh SA2 000000010 8/4 004000h–005FFFh SA3 000000011 8/4 006000h–007FFFh SA4 000000100 8/4 008000h–009FFFh SA5 ...
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Table 7.4 S29GL032A (Models R1, R2) Sector Addresses Sector Size 8-bit (KB/ Address Sector A20-A15 Kwords) Range SA0 64/32 000000–00FFFF SA1 64/32 010000–01FFFF SA2 ...
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Table 7.5 S29GL032A (Model R3, W3) Top Boot Sector Addresses Sector Size 8-bit (KB/ Address Sector A20–A12 Kwords) Range SA0 000000xxx 64/32 000000h–00FFFFh SA1 000001xxx 64/32 010000h–01FFFFh SA2 000010xxx 64/32 020000h–02FFFFh SA3 000011xxx 64/32 030000h–03FFFFh SA4 000100xxx 64/32 040000h–04FFFFh SA5 ...
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Table 7.6 S29GL032A (Model R4, W4) Bottom Boot Sector Addresses Sector Size 8-bit (KB/ Address Sector A20–A12 Kwords) Range SA0 000000000 8/4 000000h–001FFFh SA1 000000001 8/4 002000h–003FFFh SA2 000000010 8/4 004000h–005FFFh SA3 000000011 8/4 006000h–007FFFh SA4 000000100 8/4 008000h–009FFFh SA5 ...
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Table 7.7 S29GL064A (Models R1, R2, R8, R9) Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A15 Kwords) Range SA0 0000000 64/32 000000–00FFFF SA1 0000001 64/32 010000–01FFFF SA2 0000010 64/32 020000–02FFFF SA3 0000011 64/32 030000–03FFFF SA4 ...
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Table 7.7 S29GL064A (Models R1, R2, R8, R9) Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A15 Kwords) Range SA74 1001010 64/32 4A0000–4AFFFF SA75 1001011 64/32 4B0000–4BFFFF SA76 1001100 64/32 4C0000–4CFFFF SA77 1001101 64/32 4D0000–4DFFFF SA78 ...
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Table 7.8 S29GL064A (Model R3) Top Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A12 Kwords) Range SA0 0000000xxx 64/32 000000h–00FFFFh SA1 0000001xxx 64/32 010000h–01FFFFh SA2 0000010xxx 64/32 020000h–02FFFFh SA3 0000011xxx 64/32 030000h–03FFFFh SA4 0000100xxx ...
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Table 7.8 S29GL064A (Model R3) Top Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A12 Kwords) Range SA68 1000100xxx 64/32 440000h–44FFFFh SA69 1000101xxx 64/32 450000h–45FFFFh SA70 1000110xxx 64/32 460000h–46FFFFh SA71 1000111xxx 64/32 470000h–47FFFFh SA72 1001000xxx ...
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Table 7.9 S29GL064A (Model R4) Bottom Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A12 Kwords) Range SA0 0000000000 8/4 000000h–001FFFh SA1 0000000001 8/4 002000h–003FFFh SA2 0000000010 8/4 004000h–005FFFh SA3 0000000011 8/4 006000h–007FFFh SA4 0000000100 ...
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Table 7.9 S29GL064A (Model R4) Bottom Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21–A12 Kwords) Range SA54 0101111xxx 64/32 2F0000h–2FFFFFh SA55 0110000xxx 64/32 300000h–30FFFFh SA56 0110001xxx 64/32 310000h–31FFFFh SA57 0110010xxx 64/32 320000h–32FFFFh SA58 0110011xxx ...
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Table 7.10 S29GL064A (Model R5) Sector Addresses (Sheet Sector A21–A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4 0000100 SA5 0000101 SA6 0000110 SA7 0000111 SA8 0001000 SA9 0001001 SA10 0001010 SA11 0001011 SA12 0001100 SA13 ...
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Table 7.10 S29GL064A (Model R5) Sector Addresses (Sheet Sector A21–A15 SA42 0101010 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 SA53 0110101 SA54 0110110 SA55 ...
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Table 7.11 S29GL064A (Models R6, R7) Sector Addresses (Sheet Sector A21–A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4 0000100 SA5 0000101 SA6 0000110 SA7 0000111 SA8 0001000 SA9 0001001 SA10 0001010 SA11 0001011 SA12 0001100 ...
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Table 7.11 S29GL064A (Models R6, R7) Sector Addresses (Sheet Sector A21–A15 SA42 0101010 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 SA53 0110101 SA54 0110110 ...
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Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector group protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its ...
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Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group (see Table 7.11 on page 38 feature re-enables both program and erase operations in previously protected sector groups. ...
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Table 7.15 S29GL032A (Models R1, R2) Sector Group Protection/Unprotection Addresses Sector A20–A15 SA0 000000 SA1 000001 SA2 000010 SA3 000011 SA4–SA7 0001xx SA8–SA11 0010xx SA12–SA15 0011xx SA16–SA19 0100xx Table 7.16 S29GL032A (Model R3, W3) Sector Group Protection/Unprotection Address Table Sector ...
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Table 7.18 S29GL064A (Models R1, R2, R8, R9) Sector Group Protection/Unprotection Addresses Sector A21–A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4–SA7 00001xx SA8–SA11 00010xx SA12–SA15 00011xx SA16–SA19 00100xx SA20–SA23 00101xx SA24–SA27 00110xx SA28–SA31 00111xx SA32–SA35 01000xx SA36–SA39 01001xx ...
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Table 7.20 S29GL064A (Model R4) Bottom Boot Sector Protection/Unprotection Addresses Sector A21–A12 SA0 0000000000 SA1 0000000001 SA2 0000000010 SA3 0000000011 SA4 0000000100 SA5 0000000101 SA6 0000000110 SA7 0000000111 0000001XXX, SA8–SA10 0000010XXX, 0000011XXX, SA11–SA14 00001XXXXX SA15–SA18 00010XXXXX SA19–SA22 00011XXXXX SA23–SA26 00100XXXXX ...
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Table 7.22 S29GL064A (Models R6, R7) Sector Group Protection/Unprotection Addresses Sector A21–A15 SA0–SA3 00000 SA4–SA7 00001 SA8–SA11 00010 SA12–SA15 00011 SA16–SA19 00100 SA20–SA23 00101 SA24–SA27 00110 SA28–SA31 00111 SA32–SA35 01000 SA36–SA39 01001 SA40–SA43 01010 7.10 Temporary Sector Group Unprotect This ...
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Figure 7.2 In-System Sector Group Protect/Unprotect Algorithms START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h ...
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... Secured Silicon Sector Flash Memory Region The Secured Silicon Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The Secured Silicon Sector is 256 bytes in length, and uses a Secured Silicon Sector Indicator Bit (DQ7) to indicate whether or not the Secured Silicon Sector is locked when shipped from the factory ...
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Factory Locked: Secured Silicon Sector Programmed and Protected At the Factory In devices with an ESN, the Secured Silicon Sector is protected when the device is shipped from the factory. The Secured Silicon Sector cannot be modified in any ...
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... Software support can then be device-independent, JEDEC ID-independent, and forward- and backward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address 55h, any time the device is ready to read array data ...
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... Table 8.3 Device Geometry Definition Data N Device Size = 2 4Eh 00xxh 0017h = 64 Mb, 0016h = 32Mb, 0015h = 16Mb Flash Device Interface description (refer to CFI publication 100) 50h 000xh 0000h = x8-only bus devices 52h 0000h 0001h = x16-only bus devices 0002h = x8/x16 bus devices 54h 0005h Max ...
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Addresses (x16) Addresses (x8) 40h 41h 42h 43h 44h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh 50h May 21, 2008 S29GL-A_00_A12 Table 8.4 Primary Vendor-Specific Extended Query ...
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Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. Table 10.2 on page 61 Writing incorrect address and data values or writing them in the improper sequence may place the device ...
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... For such application requirements, please contact your local Spansion representative. Word programming is supported for backward compatibility with existing Flash driver software and for occasional writing of individual words. Use of write buffer programming (see below) is strongly recommended for general programming use when more than a few words are to be programmed ...
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... Once the specified number of write buffer locations are loaded, the system must then write the Program Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer ...
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... Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program operation is in progress. This flash device is capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases. For applications requiring incremental bit programming, a modified programming method is required ...
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... Sector Address Write first address/data Yes Abort Write to Yes Buffer Operation? No (Note 1) Write next address/data pair Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address Yes DQ7 = Data DQ1 = 1? DQ5 = 1? Yes Yes Read DQ7 - DQ0 with address = Last Loaded ...
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Note See Table 10.2 on page 61 9.5 Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation so that data can be read from any ...
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Chip Erase Command Sequence Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the ...
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Sector Erase Command Sequence Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock cycles are written, and are then followed ...
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... During an erase operation, this flash device performs multiple internal operations which are invisible to the system. When an erase operation is suspended, any of the internal operations that were not fully completed must be restarted. As such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress is impeded as a function of the number of suspends. The result is a longer cumulative erase time than without suspends ...
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... Total number of cycles in command sequence is determined by number of words written to write buffer. Maximum number of cycles in command sequence is 21, including Program Buffer to Flash command. 13. Command sequence resets device for next command after aborted write-to- buffer operation. 14. Unlock Bypass command is required prior to Unlock Bypass Program command ...
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... Total number of cycles in command sequence is determined by number of bytes written to write buffer. Maximum number of cycles in command sequence is 37, including Program Buffer to Flash command. 5. Command sequence resets device for next command after aborted write-to- buffer operation. 6. System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode ...
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Write Operation Status The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 10.2 on page 68 and DQ6 each offer a method for determining whether a ...
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Notes Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be ...
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DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any ...
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Note The system should recheck the toggle bit even if DQ5 = 1 because the toggle bit may stop toggling as DQ5 changes to 1. See Bit I on page 65 and DQ2: Toggle Bit II on page 66 10.7 ...
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Reading Toggle Bits DQ6/DQ2 Refer to Figure 10.4 on page 66 toggle bit status, it must read DQ7–DQ0 at least twice in a row to determine whether a toggle bit is toggling. Typically, the system would note and store ...
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DQ1: Write-to-Buffer Abort DQ1 indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ1 produces a 1. The system must issue the Write-to-Buffer-Abort-Reset command sequence to return the device to reading array data. See Write Buffer on page ...
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Absolute Maximum Ratings Description Storage Temperature, Plastic Packages Ambient Temperature with Power Applied Voltage with Respect to Ground Output Short Circuit Current Notes 1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs or ...
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DC Characteristics 13.1 CMOS Compatible Parameter Symbol Parameter Description (Notes) I Input Load Current LI I A9, ACC Input Load Current LIT I Reset Leakage Current LR I Output Leakage Current Initial Read Current (Notes 2, ...
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Test Conditions Note Diodes are IN3064 or equivalent. Output Load Output Load Capacitance, C (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 15. Key to Switching ...
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AC Characteristics Parameter JEDEC Std Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output Enable to ...
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Parameter JEDEC Std Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output Enable to Output Delay GLQV ...
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Addresses CE# OE# WE# Outputs RESET# RY/BY A23-A2 A1-A0* Data Bus CE# OE# Note * Figure shows device in word mode. Addresses are A1–A-1 for byte mode Figure ...
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Parameter JEDEC Std. t RESET# Pin Low (During Embedded Algorithms) to Read Mode Ready t RESET# Pin Low (NOT During Embedded Algorithms) to Read Ready t RESET# Pulse Width RP t Reset High Time Before Read RH t RESET# Input ...
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Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t Address Hold Time WLAX AH t Address Hold Time ...
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Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t Address Hold Time WLAX AH t Address Hold Time ...
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Parameter JEDEC Std AVAV AVWL AS t ASO t t WLAX AH t AHT t t DVWH WHDX DH t CEPH t OEPH t t GHWL GHWL t t ELWL CS t ...
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Addresses CE# OE# WE# Data RY/BY Notes program address program data Illustration shows device in word mode ACC May 21, 2008 S29GL-A_00_A12 D ...
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Addresses CE# OE# WE# Data RY/BY Notes sector address (for Sector Erase Valid Address for reading status data (see 2. Illustration shows device in word mode. Addresses CE OE# WE# DQ7 ...
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Addresses CE# t OEH WE# OE Valid Data DQ6 / DQ2 RY/BY# Note VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read ...
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Parameter JEDEC Std t V VIDR t RESET# Setup Time for Temporary Sector Unprotect RSP Note Not 100% tested RESET CE# WE# RY/BY RESET# SA, A6, A3, ...
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Table 16.9 Alternate CE# Controlled Erase and Program Operations-S29GL064A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...
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Table 16.10 Alternate CE# Controlled Erase and Program Operations-S29GL032A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...
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Table 16.11 Alternate CE# Controlled Erase and Program Operations-S29GL016A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...
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... SA for sector erase 555 for chip erase POLL t GHEL t t WHWH1 CPH t BUSY PBD for program 29 for program buffer to flash 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT S29GL-A Data# Polling PA DQ7# D OUT S29GL-A_00_A12 May 21, 2008 ...
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Erase And Programming Performance Sector Erase Time Chip Erase Time Total Write Buffer Program Time (Notes 3, 5) Total Accelerated Effective Write Buffer Program Time (Notes 4, 5) Chip Program Time Notes 1. Typical program and erase times assume ...
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Physical Dimensions 18.1 TS048—48-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW 0˚ PARALLEL TO SEATING PLANE Package TS 048 MO-142 (B) EC Jedec MIN NOM MAX Symbol ...
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TS056—56-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW SEE DETAIL 0. (N/2 TIPS) B PARALLEL TO SEATING PLANE Package TS 056 Jedec MO-142 (D) EC ...
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LAA064—64-Ball Fortified Ball Grid Array (BGA S29GL-A S29GL-A_00_A12 May 21, 2008 ...
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VBN048—48-Ball Fine-pitch Ball Grid Array (BGA) 10x 6 mm Package Ø0.50 +0.20 1.00 -0. PACKAGE VBN 048 JEDEC N/A 10. 6.00 mm NOM PACKAGE SYMBOL MIN NOM A --- --- A1 0.17 --- A2 0.62 ...
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VBK048—Ball Fine-pitch Ball Grid Array (BGA) 8.15x 6.15 mm Package INDEX MARK PIN A1 CORNER PACKAGE VBK 048 JEDEC N/A 8. 6.15 mm NOM PACKAGE SYMBOL MIN NOM A --- A1 0.18 A2 0.62 ...
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VBU056—Ball Fine-pitch Ball Grid Array (BGA Package 0.05 (2X) A1 CORNER 10 INDEX MARK PACKAGE JEDEC 9. 7.00 mm NOM SYMBOL MIN A --- A1 0. ...
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... Revision History Section Revision A (October 13, 2004) Global Revision A1 (December 17, 2004) Secured Silicon Sector Flash Memory Region DC Characteristics (CMOS Compatible) Revision A2 (January 28, 2005) Global Revision A3 (April 22, 2005) Global Table 7.12 Revision A4 (July 29, 2005) Global Revision A5 (January 11, 2006) Global Revision A6 (June 5, 2006) Global ...
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Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated ...