AM29LV400BB-120EC Spansion Inc., AM29LV400BB-120EC Datasheet
AM29LV400BB-120EC
Specifications of AM29LV400BB-120EC
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AM29LV400BB-120EC Summary of contents
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Am29LV400B Data Sheet This product has been retired and is not available for designs. For new and current designs, S29AL004D supersedes Am29LV400B and is the factory-recommended migration path. Please refer to the S29AL004D datasheet for specifications and ordering information. Availability ...
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... Am29LV400B 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory This product has been retired and is not available for designs. For new and current designs, S29AL004D supersedes Am29LV400B and is the factory-recommended migration path. Please refer to the S29AL004D data sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system micropro- cessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode ...
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... Standby Mode .............................................................................. 10 Automatic Sleep Mode ................................................................. 10 RESET#: Hardware Reset Pin ..................................................... 10 Output Disable Mode ................................................................... 11 Table 2. Am29LV400BT Top Boot Sector Address Table .....................11 Table 3. Am29LV400BB Bottom Boot Sector Address Table ...............11 Autoselect Mode .......................................................................... 12 Table 4. Am29LV400B Autoselect Codes (High Voltage Method) ........12 Sector Protection/Unprotection .................................................... 12 Figure 1. In-System Sector Protect/Unprotect Algorithms .................... 13 Temporary Sector Unprotect ...
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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: 3.0 – 3.6 V Speed Options Full Voltage Range: 2.7 – 3.6 V Max access time ACC Max CE# access time Max OE# access ...
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CONNECTION DIAGRAMS A15 1 2 A14 A13 3 4 A12 A11 5 A10 WE# 11 RESET RY/BY A17 ...
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CONNECTION DIAGRAMS NC RY/BY# A17 CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 ...
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... Special Handling Instructions for (FBGA) Special handling is required for Flash Memory prod- ucts in FBGA packages. PIN CONFIGURATION A0–A17 =18 addresses DQ0–DQ14 =15 data inputs/outputs DQ15/A-1 =DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# =Selects 8-bit or 16-bit mode CE# ...
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... SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top sector B = Bottom sector Valid Combinations for FBGA Packages Order Number AM29LV400BT55R, AM29LV400BB55R AM29LV400BT70, AM29LV400BB70 AM29LV400BT90, AM29LV400BB90 AM29LV400BT120, AM29LV400BB120 Am29LV400B Package Marking WAC,WAI, L400BT55R WAD,WAF, L400BB55R F, K WAK ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
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... DC Characteristics CC3 standby current specification. Automatic Sleep Mode The automatic sleep mode minimizes Flash device en- ergy consumption. The device automatically enables this mode when addresses remain stable for t ns. The automatic sleep mode is independent of the CE#, WE#, and OE# control signals. Standard ad- dress access timings provide new data when ad- dresses are changed ...
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... Table 2. Am29LV400BT Top Boot Sector Address Table Sector A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Table 3. Am29LV400BB Bottom Boot Sector Address Table Sector A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Note for Tables 2 and 3: Address range is A17:A-1 in byte mode and A17:A0 in word mode. See “ ...
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... The alternate method intended only for programming equipment requires V This method is compatible with programmer routines written for earlier 3.0 volt-only AMD flash devices. Publication number 20873 contains further details; contact an AMD representative to request a copy. The device is shipped with all sectors unprotected. ...
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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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Temporary Sector Unprotect This feature allows temporary unprotection of previ- ously protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RE- SET# pin During this mode, formerly protected ID sectors can ...
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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device op- erations. Table 5 defines the valid register command sequences. Writing incorrect address and data val- ues or writing them in the improper ...
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DQ7, DQ6, or RY/BY#. See “Write Operation Status” for information on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- ming operation. The ...
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The system can determine the status of the erase op- eration by using DQ7, DQ6, DQ2, or RY/BY#. See “Write Operation Status” for information on these sta- tus bits. ...
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DQ7 or DQ6 status bits, just as in the standard pro- gram operation. See “Write Operation Status” for more information. The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device ...
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Command Definitions Table 5. Am29LV400B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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still toggling, the de- vice did not completed the operation successfully, and the system must write the reset command to return to reading array data. The remaining scenario is that the system initially ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO I RESET Input Load Current LR V Active Read Current CC I CC1 (Note 1) V Active Write ...
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... DC CHARACTERISTICS Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note ° 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV400B 3000 3500 4000 3 ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note:Diodes are IN3064 or equivalent Figure 11. Test Setup Key To Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms and ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std. Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE Data RY/BY VCS Notes program address program data Illustration ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# and CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 programming typicals ...
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BGA BALL CAPACITANCE Parameter Symbol Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A DATA RETENTION Parameter ...
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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP December 4, 2006 21523D4 Am29LV400B Dwg rev AA; 10/99 41 ...
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PHYSICAL DIMENSIONS TSR048—48-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29LV400B Dwg rev AA; 10/99 21523D4 December 4, 2006 ...
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PHYSICAL DIMENSIONS FBA048—48-ball Fine-Pitch Ball Grid Array (FBGA package December 4, 2006 21523D4 Am29LV400B Dwg rev AF; 10/99 43 ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package Am29LV400B Dwg rev AC; 10/99 21523D4 December 4, 2006 ...
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... Revision C (January 1999) Global Added -50R speed option. Ordering Information Valid Combinations: Deleted the Am29LV400BT80 and Am29LV400BB80 entries. Erase and Programming Performance Note 2: Changed “(3.0 V for 55R)’ to “(3.0 V for regu- lated speed options)”. Revision C+1 (July 2, 1999) Global Deleted references to the 50R speed option ...
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... Please note that Spansion Inc. will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure ...