HEF4557BT NXP Semiconductors, HEF4557BT Datasheet - Page 8

• Manufacturer Part Number: HEF4557BT
• Manufacturer: NXP Semiconductors
• Type: Not Requiredr

Specifications of HEF4557BT

• Technology: CMOS
• Number Of Elements: 1
• Number Of Bits: 64
• Logic Family: 4000
• Logical Function: Shift Register
• Operating Supply Voltage (typ): 3.3/5/9/12V
• Package Type: SO
• Propagation Delay Time: 480ns
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 15V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 8.
V
[1]
[2]
Table 9.
[1]
Table 10.
P
HEF4557B_5
Product data sheet
Symbol Parameter
t
f
Length control inputs
L1
L
H
X
X
X
X
X
Symbol
P
rec
max
SS
D
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
The set-up, hold, and recovery times vary with the minimum number of bits selected. For intermediate numbers not specified, interpolate
as shown in
H = HIGH voltage level; L = LOW voltage level; X = don’t care
L2
L
L
H
X
X
X
X
recovery time
maximum
frequency
Dynamic characteristics
Interpolation table
Dynamic power dissipation P
Parameter
dynamic power
dissipation
amb
Table
= 25
L4
L
L
L
H
X
X
X
9.
°
C; for test circuit see
L8
L
L
L
L
H
X
X
Conditions
MR input;
L1 to L32 = LOW;
see
MR input;
L32 = HIGH
see
V
10 V
15 V
[1]
5 V
DD
Figure 5
Figure 5
L16
L
L
L
L
L
H
X
…continued
Typical formula for P
P
P
P
D
D
D
Figure
D
= 3500 × f
= 15000 × f
= 37000 × f
L32
L
L
L
L
L
L
H
Rev. 05 — 16 December 2009
SS
6; unless otherwise specified.
= 0 V; t
i
V
10 V
15 V
10 V
15 V
10 V
15 V
+ Σ(f
i
i
Minimum number of
bits selected
17
33
5 V
5 V
5 V
DD
+ Σ(f
+ Σ(f
1
2
3
5
9
r
o
= t
o
o
× C
[2]
× C
× C
f
D
≤
(μW)
L
20 ns; T
) × V
Extrapolation formula
L
L
) × V
) × V
DD
DD
DD
2
amb
2
2
= 25
1-to-64 bit variable length shift register
Set-up, hold, and
recovery times
see
(interpolate in 6
equal steps)
see
°
where:
f
f
C
V
Σ(f
C.
Table 8
Table 8
i
o
DD
= input frequency in MHz,
L
= output frequency in MHz,
o
= output load capacitance in pF,
× C
= supply voltage in V,
L
) = sum of the outputs.
Min
500
250
150
110
10
70
60
2.5
7
HEF4557B
Example: t
minimum, V
500 ns
435 ns
370 ns
305 ns
240 ns
175 ns
110 ns
Typ
250
125
© NXP B.V. 2009. All rights reserved.
75
50
30
25
14
20
5
Max
-
-
-
-
-
-
-
-
-
L
in pF).
rec
DD
= 5 V
Unit
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
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