74LVCH162245ADGG NXP Semiconductors, 74LVCH162245ADGG Datasheet - Page 2

• Manufacturer Part Number: 74LVCH162245ADGG
• Manufacturer: NXP Semiconductors

Specifications of 74LVCH162245ADGG

• Logic Family: LVC
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Propagation Delay Time: 11ns
• Number Of Elements: 2
• Number Of Channels: 16
• Input Logic Level: LVTTL
• Output Logic Level: LVTTL
• Output Type: 3-State
• Package Type: TSSOP
• Polarity: Non-Inverting
• Logical Function: Bus Transceiver
• Operating Supply Voltage (min): 1.2V
• Operating Supply Voltage (max): 3.6V
• Quiescent Current (typ): 100nA
• Technology: CMOS
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Note
1. C
2. The condition is V
2003 Dec 08
t
C
C
C
PHL
SYMBOL
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
MULTIBYTE
architecture
Low inductance multiple power and ground pins for
minimum noise and ground bounce
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
Integrated 30
High-impedance when V
All data inputs have bushold (74LVCH162245A only)
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 to +85 C and 40 to +125 C.
I
I/O
PD
16-bit transceiver with direction pin; 30
termination resistors; 5 V tolerant input/output; 3-state
P
f
f
C
V
N = total load switching outputs;
i
o
/t
(C
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
PD
V
CC
amb
propagation delay nAn to nBn; nBn to nAn
input capacitance
input/output capacitance
power dissipation capacitance
TM
2
V
CC
= 25 C; t
flow-through standard pin-out
termination resistors
f
o
2
) = sum of the outputs.
I
f
= GND to V
i
N + (C
CC
r
= t
PARAMETER
= 0 V
f
2.5 ns.
L
CC
.
V
CC
2
f
o
) where:
2
C
V
DESCRIPTION
The 74LVC(H)162245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In
3-state operation, outputs can handle 5 V. These features
allow the use of these devices as translators in a mixed
3.3 and 5 V environment.
The 74LVC(H)162245A is a 16-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions.
The 74LVC(H)162245A features two output enable (nOE)
inputs for easy cascading and two send/receive (nDIR)
inputs for direction control. nOE controls the outputs so
that the buses are effectively isolated. This device can be
used as two 8-bit transceivers or one 16-bit transceiver.
The 74LVCH162245A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
The 74LVC(H)162245A is designed with 30
termination resistors in both HIGH and LOW output stages
to reduce line noise.
CC
L
D
= 50 pF; V
in W).
= 3.3 V; notes 1 and 2
CONDITIONS
series
CC
= 3.3 V
3.3
5.0
10
28
TYPICAL
74LVCH162245A
74LVC162245A;
Product specification
ns
pF
pF
pF
series
UNIT