B37940R5220K43 EPCOS Inc, B37940R5220K43 Datasheet

B37940R5220K43

Manufacturer Part Number
B37940R5220K43
Description
Manufacturer
EPCOS Inc
Type
Ceramicr
Datasheet

Specifications of B37940R5220K43

Capacitance
22pF
No. Of Capacitors
4
Tolerance (+ Or -)
10%
Voltage
50VDC
Number Of Terminals
8Terminal
Temp Coeff (dielectric)
C0G
Operating Temp Range
-55C to 125C
Mounting Style
Surface Mount
Package / Case
0508
Construction
SMT Chip
Failure Rate
Not Required
Product Height (mm)
0.85mm
Product Depth (mm)
1.25mm
Product Length (mm)
2mm
Lead Diameter (nom)
Not Requiredmm
Terminal Pitch
0.5mm
Lead Free Status / Rohs Status
Compliant
Multilayer ceramic capacitors
Array capacitors, C0G
Date:
October 2006
Data Sheet
Data Sheet
ã EPCOS AG 2006. Reproduction, publication and dissemination of this data sheet and the
information contained therein without EPCOS’ prior express consent is prohibited.

Related parts for B37940R5220K43

B37940R5220K43 Summary of contents

Page 1

... Multilayer ceramic capacitors Array capacitors, C0G Date: October 2006 Data Sheet Data Sheet ã EPCOS AG 2006. Reproduction, publication and dissemination of this data sheet and the information contained therein without EPCOS’ prior express consent is prohibited. ...

Page 2

... Multilayer ceramic capacitors C0G Ordering code system B37830 R 0 101 Capacitance, coded (example) Rated voltage Internal coding “R“ indicates array capacitor Type and size Chip size Temperature characteristic (inch / mm) C0G 0405 / 1012 B37830 0508 / 1220 B37940 0612 / 1632 B37871 Please read Cautions and warnings and Important notes at the end of this document ...

Page 3

... Multilayer ceramic capacitors C0G Features ■ Reduction of mounting time and mounting costs ■ Space saving on the PCB ■ To AEC-Q200 Applications ■ Suitable for electronic circuits with parallel line layout ■ Coupling and filtering, particularly in RF circuits ■ Resonant circuits ■ Filter circuits Termination ■ ...

Page 4

... Multilayer ceramic capacitors C0G C0G Capacitance tolerances Code letter J K (standard) ± 5% ± 10% Tolerance Dimensional drawing 2-fold array (case size 0405 KKE0330-R Dimensions (mm) 2-fold array Case size (inch) 0405 (mm) 1012 1.37 ± 0. 1.00 +0/–0.15 s 0.70 max. 0.36 ± 0 0.64 0.20 ± 0.1 ...

Page 5

... Termination Termination Ceramic body (nickel barrier) Please read Cautions and warnings and Important notes at the end of this document. Multilayer ceramic capacitors 4-fold array (case sizes 0508 and 0612 0.50 … 0.45 … 1.45 … 0.55 ...

Page 6

... Multilayer ceramic capacitors C0G C0G Product range array capacitors, C0G 2-fold arrays 1) Size inch 0405 mm 1012 Type B37830 V (VDC 100 pF 150 pF 180 pF 220 pF 330 pF 470 pF 680 pF 1 ´ b (inch ´ b (mm) Please read Cautions and warnings and Important notes at the end of this document. ...

Page 7

... The table contains the ordering codes for the standard capacitance tolerance. For other available capacitance tolerances see page 128. Please read Cautions and warnings and Important notes at the end of this document. Multilayer ceramic capacitors C0G; 0405 Chip thickness Cardboard tape, Æ 180-mm reel ...

Page 8

... Multilayer ceramic capacitors C0G C0G; 0508 and 0612 Ordering codes and packing for C0G arrays, 50 VDC, nickel barrier terminations Ordering code R Case size 0508, 50 VDC, 4-fold arrays 10. pF B37940R5100K04* 15. pF B37940R5150K04* 22. pF B37940R5220K04* 33. pF B37940R5330K04* 47. pF B37940R5470K04* 68. pF B37940R5680K04* 100. pF B37940R5101K04* 150 ...

Page 9

... For more detailed information on frequency behavior and characteristics see www.epcos.com/mlcc_impedance. Please read Cautions and warnings and Important notes at the end of this document. Multilayer ceramic capacitors Capacitance change D C/C ) superimposed DC voltage V KKE0107-F 0.5 ∆ 0.3 0.2 0 0.1 _ 0.2 _ 0.3 _ 0.4 _ 0.5 ...

Page 10

... Multilayer ceramic capacitors C0G C0G 1) Typical characteristics Insulation resistance R versus ins temperature Ω ins 100 1) For more detailed information on frequency behavior and characteristics see www.epcos.com/mlcc_impedance. Please read Cautions and warnings and Important notes at the end of this document. Capacitance change D C/C time t ...

Page 11

... At least FR4 circuit board material should be used. 3. Geometrically optimal circuit boards should be used, ideally those that cannot be deformed. 4. Ceramic capacitors must always be placed a sufficient minimum distance from the edge of the circuit board. High bending forces may be exerted there when the panels are separated and dur- ing further processing of the board (such as when incorporating it into a housing) ...

Page 12

... Ensure the correct solder meniscus height and solder quantity. 12. Ensure correct dosing of the cement quantity. 13. Ceramic capacitors with an AgPd external termination are not suited for the lead-free solder process: they were developed only for conductive adhesion technology. This listing does not claim to be complete, but merely reflects the experience of EPCOS AG. ...

Page 13

... Multilayer ceramic capacitors Important notes The following applies to all products named in this publication: 1. Some parts of this publication contain statements about the suitability of our products for certain areas of application. These statements are based on our knowledge of typical requirements that are often placed on our products in the areas of application concerned. We nevertheless expressly point out that such statements cannot be regarded as binding statements about the suitability of our products for a particular customer application ...

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