HN58X2464TI Renesas Electronics America, HN58X2464TI Datasheet - Page 10

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HN58X2464TI

Manufacturer Part Number
HN58X2464TI
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HN58X2464TI

Density
64Kb
Interface Type
Serial (2-Wire)
Organization
8Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
10Year
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant

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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I
Device Address (A0, A1, A2)
Eight devices can be wired for one common data bus line as maximum. Device address pins are used to
distinguish each device and device address pins should be connected to V
code provided from SDA pin matches corresponding hard-wired device address pins A0 to A2, that one
device can be activated. As for 8k to 16k EEPROM, whole or some device address pins don't need to be
fixed since device address code provided from the SDA pin is used as memory address signal.
Pin Connections for A0 to A2
Memory size
8k bit
16k bit
32k bit
64k bit
Notes: 1. “V
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table. When the WP is low, write operation for all memory arrays are allowed. The read
operation is always activated irrespective of the WP pin status. WP should be fixed high or low during
operations since WP does not provide a latch function.
Write Protect Area
WP pin
status
V
V
Rev.5.00, Jan.14.2005, page 8 of 20
IH
IL
2. × = Don’t care (Open is also approval.)
CC
Max connect
number
2
1
8
8
Write protect area
8k bit
Upper 1/2 (4k bit)
Normal read/write operation
/V
SS
” means that device address pin should be connected to V
Pin connection
A2
V
1
×
V
V
CC
CC
CC
/V
/V
/V
SS
SS
SS
*
16k bit
Upper 1/2 (8k bit)
A1
×*
×
V
V
CC
CC
2
/V
/V
SS
SS
A0
×
×
V
V
CC
CC
/V
/V
SS
SS
Notes
Use A0, A1 for memory address a8 and a9
Use A0, A1, A2 for memory address a8, a9 and
a10
32k bit
Upper 1/4 (8k bit)
CC
or V
CC
or V
SS
. When device address
SS
64k bit
Upper 1/4 (16k bit)
.

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