CY7C68013-128AXC Cypress Semiconductor Corp, CY7C68013-128AXC Datasheet - Page 27

• Manufacturer Part Number: CY7C68013-128AXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C68013-128AXC

• Cpu Family: FX2LP
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 48MHz
• Interface Type: I2C/USB
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 8KB
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Lead Free Status / Rohs Status: Compliant

Table 5-1. FX2 Register Summary (continued)
Document #: 38-08012 Rev. *F
E6EA
E6EB
Notes:
E6E2
E6E3
E6E4
E6F0
E6F1
E6F2
E6F3
E6F4
E6F5
E6F6
E7C0 64 EP1INBUF
FC00 512 EP8FIFOBUF
FE00 512 reserved
E740 64 EP0BUF
E780 64 EP10UTBUF
F000 1024 EP2FIFOBUF
F400 512 EP4FIFOBUF
F600 512 reserved
F800 1024 EP6FIFOBUF
xxxx
Hex Size Name
E6E
7.
8.
8A
8B
8C
8D
8E
80
81
82
83
84
85
86
87
88
89
8F
90
91
92
93
98
99
C
2048 reserved
SFRs not part of the standard 8051 architecture.
If no EEPROM is detected by the SIE then the default is 00000000.
1
1
1
3
1
1
1
3
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
1
1
reserved
reserved
EP6GPIFFLGSEL
[6]
EP6GPIFPFSTOP Endpoint 6 GPIF stop trans-
EP6GPIFTRIG
reserved
reserved
reserved
EP8GPIFFLGSEL
[6]
EP8GPIFPFSTOP Endpoint 8 GPIF stop trans-
EP8GPIFTRIG
reserved
XGPIFSGLDATH GPIF Data H (16-bit mode
XGPIFSGLDATLX Read/Write GPIF Data L &
XGPIFSGLDATL-
NOX
GPIFREADYCFG Internal RDY, Sync/Async,
GPIFREADYSTAT GPIF Ready Status
GPIFABORT
reserved
ENDPOINT BUFFERS
I²C Compatible Configuration Byte
Special Function Registers (SFRs)
IOA
SP
DPL0
DPH0
DPL1
DPH1
DPS
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
reserved
IOB
EXIF
MPAGE
reserved
SCON0
SBUF0
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[6]
[6]
Description
Endpoint 6 GPIF Flag select
action on prog. flag
Endpoint 6 GPIF Trigger
Endpoint 8 GPIF Flag select
action on prog. flag
Endpoint 8 GPIF Trigger
only)
trigger transaction
Read GPIF Data L, no trans-
action trigger
RDY pin states
Abort GPIF Waveforms
EP0-IN/-OUT buffer
EP1-OUT buffer
EP1-IN buffer
512/1024-byte EP 2 / slave
FIFO buffer (IN or OUT)
512 byte EP 4 / slave FIFO
buffer (IN or OUT)
512/1024-byte EP 6 / slave
FIFO buffer (IN or OUT)
512 byte EP 8 / slave FIFO
buffer (IN or OUT)
Port A (bit addressable)
Stack Pointer
Data Pointer 0 L
Data Pointer 0 H
Data Pointer 1 L
Data Pointer 1 H
Data Pointer 0/1 select
Power Control
Timer/Counter Control (bit
addressable)
Timer/Counter Mode Control
Timer 0 reload L
Timer 1 reload L
Timer 0 reload H
Timer 1 reload H
Clock Control
Port B (bit addressable)
External Interrupt Flag(s)
Upper Addr Byte of MOVX
using @R0 / @R1
Serial Port 0 Control (bit ad-
dressable)
Serial Port 0 Data Buffer
INTRDY
SMOD0
SM0_0
GATE
D15
D15
D15
A15
A15
TF1
A15
IE5
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
D7
b7
A7
A7
0
0
0
0
0
0
0
x
x
x
x
DISCON
SM1_0
D14
SAS
TR1
D14
D14
A14
A14
A14
IE4
D6
D6
D6
D6
D6
D6
D6
D6
D6
D6
D6
CT
D6
D6
D6
D6
b6
A6
A6
0
0
x
0
0
x
0
x
0
x
x
TCXRDY5
I²CINT
SM2_0
RDY5
T2M
D13
D13
D13
A13
A13
TF0
A13
D5
D5
D5
D5
D5
D5
D5
D5
D5
D5
D5
M1
D5
D5
D5
D5
b5
A5
A5
0
0
x
0
0
x
x
0
0
1
USBNT
REN_0
RDY4
T1M
D12
A12
A12
TR0
D12
D12
A12
D4
D4
D4
D4
D4
D4
D4
D4
D4
D4
D4
A4
A4
M0
D4
D4
D4
D4
b4
0
0
x
0
0
x
0
x
0
0
1
TB8_0
RDY3
GATE
T0M
GF1
D11
A11
A11
D11
D11
A11
IE1
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
D3
b3
A3
A3
0
0
x
0
0
x
0
x
0
0
1
RB8_0
RDY2
MD2
D10
GF0
D10
D10
A10
A10
A10
D2
D2
D2
D2
D2
D2
D2
D2
D2
D2
D2
IT1
CT
D2
D2
D2
D2
b2
A2
A2
0
0
x
0
0
x
0
x
0
0
0
STOP
RDY1
MD1
TI_0
FS1
FS1
IE0
M1
b1
D9
D1
D1
D1
D1
D1
D1
D1
D1
D1
D1
D1
A1
A9
A1
A9
D1
D1
D9
D9
D1
A9
D1
0
0
0
0
0
0
x
x
x
FIFO6FLAG 00000000
FIFO8FLAG 00000000
400KHZ
CY7C68013
RDY0
IDLE
MD0
RI_0
FS0
FS0
SEL
IT0
M0
D8
D0
D0
D0
D0
D0
D0
D0
D0
D0
D0
D0
A0
A8
A0
A8
D0
D0
D8
D8
D0
A8
D0
b0
x
x
0
x
0
Page 27 of 48
00000000
00000000
00000000 bbbrrrrr
00000000
00000000
00000000
00000000
00000000
00110000
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00001000
00000000
00000000
00000000
00xxxxxx
00000111
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
Default
[8]
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
n/a
W
W
W
R
R