CY7C346B-25NC Cypress Semiconductor Corp, CY7C346B-25NC Datasheet - Page 5

• Manufacturer Part Number: CY7C346B-25NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C346B-25NC

• Family Name: MAX®
• Memory Type: EPROM
• # Macrocells: 128
• Number Of Usable Gates: 2500
• Frequency (max): 62.5MHz
• Propagation Delay Time: 25ns
• Number Of Logic Blocks/elements: 8
• # I/os (max): 64
• Operating Supply Voltage (typ): 5V
• In System Programmable: No
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

program data, may be reset simply by erasing the entire
device.
The CY7C346B is fully functionally tested and guaranteed
through complete testing of each programmable EPROM bit
and all internal logic elements thus ensuring 100%
programming yield.
The erasable nature of these devices allows test programs to
be used and erased during early stages of the production flow.
The devices also contain on-board logic test circuitry to allow
verification of function and AC specification once encapsu-
lated in non-windowed packages.
Typical I
Output Drive Current
Document #: 38-03037 Rev. *C
250
400
300
200
100
200
150
100
50
100 Hz
CC
0
0
vs. f
1 kHz
V
1
O
MAXIMUM FREQUENCY
MAX
V
Room Temp.
OUTPUT VOLTAGE (V)
CC
10 kHz
= 5.0V
I
OL
2
100 kHz 1 MHz
V
Room Temp.
I
CC
3
OH
= 5.0V
4
10 MHz
USE ULTRA37000™ FOR
ALL NEW DESIGNS
50 MHz
5
Timing Considerations
Unless otherwise stated, propagation delays do not include
expanders. When using expanders, add the maximum
expander delay t
additional t
compared to a signal from straight input pin.
When calculating synchronous frequencies, use t
inputs are on dedicated input pins. When expander logic is
used in the data path, add the appropriate maximum expander
delay, t
or 1/(t
frequencies is the maximum data path frequency for the
synchronous configuration.
When calculating external asynchronous frequencies, use
t
When expander logic is used in the data path, add the
appropriate maximum expander delay, t
Determine which of 1/(t
t
frequencies is the maximum data path frequency for the
asynchronous configuration.
The parameter t
device when driving other synchronous logic with positive
input hold times, which is controlled by the same
synchronous clock. If t
required input hold time of the subsequent synchronous
logic, then the devices are guaranteed to function properly
with a common synchronous clock under worst-case
environmental and supply voltage conditions.
AS1
AS1
) is the lowest frequency. The lowest of these
if all inputs are on the dedicated input pins.
EXP
EXP
+ t
to t
PIA
SU
SU
) is the lowest frequency. The lowest of these
delay for an input from an I/O pin when
OH
EXP
. Determine which of 1/(t
indicates the system compatibility of this
to the overall delay. Similarly, there is an
AWH
OH
is greater than the minimum
+ t
AWL
), 1/t
ACO1
CY7C346B
WH
EXP
+ t
, or 1/(t
Page 5 of 15
WL
), 1/t
to
SU
EXP
if all
t
CO1
AS1
+
,
.