CY7C133-35JC Cypress Semiconductor Corp, CY7C133-35JC Datasheet - Page 9

• Manufacturer Part Number: CY7C133-35JC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C133-35JC

• Density: 32Kb
• Access Time (max): 35ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 11b
• Package Type: PLCC
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 230mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 68
• Word Size: 16b
• Number Of Words: 2K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-06036 Rev. *B
Switching Waveforms
Timing Waveform of Read with Port-to-port Delay No. 4 (for slave CY7C143)
Write Cycle No. 1 (OE Three-States Data I/Os - Either Port)
Notes:
24. Assume BUSY input at V
25. Write cycle parameters should be adhered to in order to ensure proper writing.
26. Device is continuously enabled for both ports.
27. If OE is LOW during a R/W controlled write cycle, the write pulse width must be the larger of t
ADDRESS
DATA
CE
R/W
D
impedance and for data to be placed on the bus for the required t
ADDRESS
ADDRESS
OE
OUT
IN
DOUT
D
R/W
INR
R
L
R
L
IH
for the writing port and at V
t
HZOE
(continued)
t
SA
IL
for the reading port.l
t
SCE
t
AW
SD
Either Port
t
.
MATCH
WC
t
WC
[17, 27]
HIGH IMPEDANCE
t
WP
DATA VALID
t
PWE
t
SD
MATCH
PWE
t
DW
t
[24, 25, 26]
WDD
or t
HZWE
VALID
t
DDD
t
+ t
HD
SD
t
HA
to allow the data I/O pins to enter high
t
DH
CY7C133
CY7C143
Page 9 of 13
VALID
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