CY7C133-35JC Cypress Semiconductor Corp, CY7C133-35JC Datasheet - Page 4
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CY7C133-35JC
Manufacturer Part Number
CY7C133-35JC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C133-35JC.pdf
(13 pages)
Specifications of CY7C133-35JC
Density
32Kb
Access Time (max)
35ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
11b
Package Type
PLCC
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
230mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Word Size
16b
Number Of Words
2K
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Document #: 38-06036 Rev. *B
Table 1. Non-Contending Read/Write Control
Table 2. Address BUSY Arbitration
32-Bit Master/Slave Dual-Port Memory Systems
Table 3. Arbitration Results
Notes:
3.
4.
R/W
X
H
H
H
H
L
L
L
The loser of the port arbitration will receive BUSY = “L” (BUSY
Writes are inhibited to the left port when BUSY
Case
CE
LB
X
H
X
L
1
2
3
4
5
6
7
8
L
R/W
X
H
H
H
H
L
L
L
UB
Control
CE
Read
Read
Read
Read
Write
Write
Write
Write
Left
X
X
H
L
R
CE
Inputs
H
L
L
L
L
L
L
L
BUSY
R/W
Port
OE
H
H
H
X
X
L
L
L
Right
Read
Read
Write
Write
Read
Read
Write
Write
Address
Address
No Match
LEFT
Match
Match
Match
L
is LOW. Writes are inhibited to the right port when BUSY
R
L
Data Out
Data Out
I/O
Data In
Data In
Data In
High Z
High Z
High Z
0
–I/O
Winning Port
L
8
or BUSY
R/W
BUSY
5V
R
R
R
R
L
L
L
L
I/O
BUSY
R
Note 3
= “L”). BUSY
H
H
H
I/O
Data Out
Data Out
CY7C133
CY7C143
Data In
Data In
Data In
High Z
High Z
High Z
L
9
–I/O
Outputs
Both ports read
Both ports read
L port reads OK R port write inhibited
R port writes OK L port data may be invalid
L port writes OK R port data may be invalid
R port reads OK L port write inhibited
L port writes OK R port write inhibited
R port writes OK L port write inhibited
L
17
and BUSY
BUSY
BUSY
R/W
Note 3
Deselected: Power-Down
Write to Both Bytes
Write Lower Byte, Read Upper Byte
Read Lower Byte, Write Upper Byte
Write to Lower Byte
Write to Upper Byte
Read to Both Bytes
High Impedance Outputs
5V
H
H
H
R
cannot both be LOW simultaneously.
R
R
is LOW.
Normal
Normal
Normal
Write Inhibit
Result
RIGHT
Operation
[4]
Function
BUSY
R/W
CY7C133
CY7C143
Page 4 of 13
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