CY7C1312AV18-133BZC Cypress Semiconductor Corp, CY7C1312AV18-133BZC Datasheet - Page 12

• Manufacturer Part Number: CY7C1312AV18-133BZC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1312AV18-133BZC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Document #: 38-05497 Rev. *A
Switching Waveforms
Notes:
21. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0 i.e., A0+1.
22. Output are disabled (High-Z) one clock cycle after a NOP.
23. In this example , if address A2=A1,then data Q20=D10 and Q21=D11. Write data is forwarded immediately as read results. This note applies to the whole diagram.,
Read/Write/Deselect Sequence
WPS
RPS
CQ
CQ
Q
K
K
A
D
C
C
1
A0
D10
READ
t KHCH
t KH
t KH
t SA t HA
D11
A1
2
WRITE
t
t KL
SC
t KL
t KHCH
t SA t HA
D30
[21,22,23]
A2
3
READ
t SD
t CQOH
t HC
t
t KHKH
t CLZ
t CCQO
t CYC
D31
A3
t CO
4
WRITE
t HD
t CQOH
t CCQO
t DOH
PRELIMINARY
Q00
D50
t CYC
A4
5
READ
t KHKH
t CO
t DOH
Q01
D51
A5
6
WRITE
t SD
Q20
D60
7
t CQD
NOP
t HD
Q21
D61
A6
8
DON’T CARE
WRITE
Q40
9
CY7C1310AV18
CY7C1312AV18
CY7C1314AV18
NOP
UNDEFINED
Q41
t CHZ
10
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