CY7C1018BV33-12VC Cypress Semiconductor Corp, CY7C1018BV33-12VC Datasheet - Page 3

• Manufacturer Part Number: CY7C1018BV33-12VC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1018BV33-12VC

• Density: 1Mb
• Access Time (max): 12ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: SOJ
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 160mA
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

AC Test Loads and Waveforms
OUTPUT
Switching Characteristics
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes:
Equivalent to:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4.
5.
6.
7.
8.
Parameter
INCLUDING
JIG AND
SCOPE
3.3V
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
t
At any given temperature and voltage condition, t
The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these
signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
OL
HZOE
/I
OH
OUTPUT
, t
HZCE
and 30-pF load capacitance.
30 pF
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
[7, 8]
(a)
THÉ
HZWE
R1 480
VENIN EQUIVALENT
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
167
Description
255
R2
[6]
[4]
[5, 6]
[6]
[5, 6]
[5, 6]
OUTPUT
Over the Operating Range
1.73V
INCLUDING
JIG AND
SCOPE
3.3V
HZCE
is less than t
5 pF
(b)
R1 480
LZCE
7C1019BV33-10
7C1018BV33-10
Min.
10
10
3
0
3
0
8
7
0
0
7
5
0
3
, t
HZOE
3
is less than t
255
R2
Max.
10
10
10
5
5
5
5
LZOE
GND
3.0V
, and t
HZWE
7C1019BV33-12
7C1018BV33-12
Min.
3 ns
12
12
3
0
3
0
9
8
0
0
8
6
0
3
HZWE
and t
is less than t
SD
.
Max.
10%
12
12
12
6
6
6
6
90%
LZWE
ALL INPUT PULSES
for any given device.
7C1019BV33-15
7C1018BV33-15
CY7C1019BV33
CY7C1018BV33
Min.
15
15
10
10
10
3
0
8
3
3
0
0
0
0
Max.
15
15
15
7
7
7
7
90%
10%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3 ns