CY7C1018BV33-12VC Cypress Semiconductor Corp, CY7C1018BV33-12VC Datasheet

no-image

CY7C1018BV33-12VC

Manufacturer Part Number
CY7C1018BV33-12VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1018BV33-12VC

Density
1Mb
Access Time (max)
12ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
160mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
019V33
Features
Functional Description
The CY7C1019BV33/CY7C1018BV33 is a high-performance
CMOS static RAM organized as 131,072 words by 8 bits. Easy
memory expansion is provided by an active LOW Chip Enable
(CE), an active LOW Output Enable (OE), and three-state driv-
ers. This device has an automatic power-down feature that
significantly reduces power consumption when deselected.
Selection Guide
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
• High speed
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019V33 and/or
Logic Block Diagram
WE
CE
OE
CY7C1018V33
— t
A
A
A
A
A
A
A
A
A
AA
0
1
2
3
4
5
6
7
8
= 10 ns
INPUT BUFFER
512 x 256 x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
3901 North First Street
L
7C1019BV33-10
7C1018BV33-10
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
fied on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019BV33 is available in standard 32-pin TSOP
Type II and 400-mil-wide package. The CY7C1018BV33 is
available in a standard 300-mil-wide package.
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
175
10
5
0
through I/O
San Jose
V
I/O
I/O
V
I/O
I/O
128K x 8 Static RAM
7C1019BV33-12
7C1018BV33-12
WE
CE
CC
A
A
A
A
A
A
A
A
SS
7
7
) is then written into the location speci-
0
1
2
0
1
2
3
4
5
6
3
Pin Configurations
160
0.5
0
12
SOJ / TSOPII
5
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
through A
CA 95134
Top View
0
CY7C1019BV33
CY7C1018BV33
through I/O
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
).
7C1019BV33-15
7C1018BV33-15
7
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
) are placed in a
SS
CC
16
15
14
13
12
11
10
9
8
June 11, 2001
408-943-2600
7
6
5
4
145
0.5
15
5

Related parts for CY7C1018BV33-12VC

CY7C1018BV33-12VC Summary of contents

Page 1

... The eight input/output pins (I/O high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1019BV33 is available in standard 32-pin TSOP Type II and 400-mil-wide package. The CY7C1018BV33 is available in a standard 300-mil-wide package. I/O 0 I/O 1 I/O 2 ...

Page 2

... IN IL MAX Max > V – 0.3V > V – 0.3V < 0.3V Test Conditions T = 25° MHz 5. CY7C1019BV33 CY7C1018BV33 Ambient [2] Temperature 0°C to +70°C 7C1019BV33-12 7C1019BV33-15 7C1018BV33-12 7C1018BV33-15 Max. Min. Max. Min. 2.4 2.4 0.4 0.4 V 2 0.3 + 0.3 0.8 –0.3 0.8 – ...

Page 3

... The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum 480 3.3V 3.0V R2 GND 5 pF 255 INCLUDING JIG AND SCOPE (b) 1.73V 7C1019BV33-10 7C1018BV33-10 Min. Max less than less than t HZCE LZCE HZOE LZOE 3 CY7C1019BV33 CY7C1018BV33 ALL INPUT PULSES 90% 10 7C1019BV33-12 7C1019BV33-15 7C1018BV33-12 7C1018BV33-15 Min. Max. Min. Max ...

Page 4

... Over the Operating Range (L Version Only) Conditions No input may exceed 2.0V > V – 0.3V > V – 0. DATA RETENTION MODE 3.0V V > CDR OHA DOE DATA VALID 50 CY7C1019BV33 CY7C1018BV33 Min. Max. + 0.5V 2.0 CC 150 0 < 0.3V IN 200 3. DATA VALID t HZOE t HZCE HIGH IMPEDANCE t PD 50% Unit ICC ISB ...

Page 5

... If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 14. During this period the I/Os are in the output state and input signals should not be applied SCE SCE PWE t SD DATA VALID [12, 13 SCE PWE t SD DATA VALID IN 5 CY7C1019BV33 CY7C1018BV33 ...

Page 6

... Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS NOTE 14 DATA I/O t HZWE Truth Table I High High Data Out Data High Z [13 SCE PWE t SD DATA VALID –I/O Mode 0 7 Power-Down Power-Down Read Write Selected, Outputs Disabled 6 CY7C1019BV33 CY7C1018BV33 LZWE Power Standby ( Standby ( Active ( Active ( Active ( ...

Page 7

... Ordering Information Speed (ns) Ordering Code 10 CY7C1018V33-10VC CY7C1019BV33-10VC CY7C1019BV33-10ZC 12 CY7C1018BV33-12VC CY7C1018BV33L-12VC CY7C1019BV33-12VC CY7C1019BV33-12ZC CY7C1019BV33L-12VC CY7C1019BV33L-12ZC 15 CY7C1018BV33-15VC CY7C1018BV33L-15VC CY7C1018BV33-15VI CY7C1019BV33-15VC CY7C1019BV33-15ZC CY7C1019BV33L-15VC CY7C1019BV33L-15ZC CY7C1019BV33-15VI CY7C1019BV33-15ZI Document #: 38-01053-*B Package Name Package Type V32 32-Lead 300-Mil Molded SOJ V33 32-Lead 400-Mil Molded SOJ ZS32 32-Lead TSOP Type II ...

Page 8

... Package Diagram 32-Lead (400-Mil) Molded SOJ V33 32-Lead (300-Mil) Molded SOJ V32 8 CY7C1019BV33 CY7C1018BV33 51-85041-A 51-85041 ...

Page 9

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 32-Lead TSOP II ZS32 CY7C1019BV33 CY7C1018BV33 51-85095 ...

Related keywords