IS61C6416-12T ISSI, Integrated Silicon Solution Inc, IS61C6416-12T Datasheet - Page 8

• Manufacturer Part Number: IS61C6416-12T
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61C6416-12T

• Density: 1Mb
• Access Time (max): 12ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 16b
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 280mA
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 64K
• Lead Free Status / Rohs Status: Not Compliant

WRITE CYCLE NO. 3
Notes:
1. The internal write time is defined by the overlap of
2. I/O will assume the High-Z state if
WRITE CYCLE NO. 2
IS61C6416
8
ADDRESS
ADDRESS
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
UB, LB
UB, LB
D
D
OUT
WE
D
OE
CE
OUT
WE
D
OE
CE
IN
IN
LOW
LOW
LOW
t
SA
t
DATA UNDEFINED
SA
DATA UNDEFINED
(
(
OE
OE
is LOW During Write Cycle)
is HIGH During Write Cycle)
OE
V
IH
.
CE
VALID ADDRESS
t
t
t
t
AW
HZWE
LOW and
AW
HZWE
VALID ADDRESS
t
t
PWE1
WC
(1)
t
(1,2)
t
WE
PWE2
t
WC
t
PBW
PBW
LOW. All signals must be in valid states to initiate a Write,
Integrated Silicon Solution, Inc. — 1-800-379-4774
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
HD
t
t
LZWE
LZWE
t
t
HA
HA
ISSI
UB_CEWR2.eps
UB_CEWR3.eps
SR005-1D
05/24/99
®