IMIZ9974CA Cypress Semiconductor Corp, IMIZ9974CA Datasheet

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IMIZ9974CA

Manufacturer Part Number
IMIZ9974CA
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of IMIZ9974CA

Number Of Outputs
15
Operating Supply Voltage (max)
3.47V
Operating Temp Range
-40C to 85C
Propagation Delay Time
0.1ns
Operating Supply Voltage (min)
3.14V
Mounting
Surface Mount
Pin Count
52
Operating Supply Voltage (typ)
3.3V
Package Type
TQFP
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant

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Part Number:
IMIZ9974CA
Quantity:
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Features
Description
The Z9974 is a low-cost 3.3V zero delay clock driver for
high-speed signal buffering and redistribution.
The designer can select various Input/Output Frequency by
setting fsela, fselb, fselc, fselFB(0:1), and VCO_Sel.
Cypress Semiconductor Corporation
Document #: 38-07090 Rev. *C
• Output Frequency up to 125 MHz
• Supports PowerPC
• 15 Clock outputs: frequency configurable
• Two Reference clock inputs for dynamic toggling
• Output Three-State control
• Spread spectrum compatible
• 3.3V power supply
• Pin compatible with MPC974
• Industrial temperature range: –40°C to +85°C
• 52-pin TQFP package
Pin Configuration
®
, and Pentium
3.3V, 125-MHz, Multi-Output Zero Delay Buffer
TClk_Sel
PLL_EN
®
VDDA
VSSA
TClk0
TClk1
processors
VDDI
MR#
fselb
fselc
fsela
OE
NC
3901 North First Street
1
2
3
4
5
6
7
8
9
10
11
12
13
52 51 50 49 48 47 46 45 44 43 42 41 40
14 15 16 17 18 19 20 21 22 23 24 25 26
Z9974
The Z9974 integrates PLL technology for zero delay propaga-
tion from input to output. The PLL feedback is externally avail-
able for propagation delay tuning and divide ratio alternatives
as per Table 1.
The Z9974 has three banks of outputs with independent divid-
er stages. These dividers allow the banks to have different
frequencies as per Table 2.
TCLK0 and TCLK1 are selectable input reference clocks and
may be toggled dynamically during operation to provide mod-
ulation and phase shifting designs.
This device includes a Master Reset signal, which disables the
outputs (Hi-Z) mode, and reset all internal digital circuitry (ex-
cluding the PLL).
An Output Enable, OE, input pin is available for disabling the
Qa(0:4), Qb(0:4), and Qc(0:3) outputs and forcing them to
LOW state. All outputs are held LOW with input clock turned
off.
San Jose
39
38
37
36
35
34
33
32
31
30
29
28
27
VSSb
QB1
VDDb
Qb2
VSSb
Qb3
VDDb
Qb4
FB_IN
VSSFB
QFB
VDDFB
NC
CA 95134
Revised December 21, 2002
408-943-2600
Z9974

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IMIZ9974CA Summary of contents

Page 1

... The designer can select various Input/Output Frequency by setting fsela, fselb, fselc, fselFB(0:1), and VCO_Sel. Pin Configuration TClk_Sel Cypress Semiconductor Corporation Document #: 38-07090 Rev. *C The Z9974 integrates PLL technology for zero delay propaga- tion from input to output. The PLL feedback is externally avail- able for propagation delay tuning and divide ratio alternatives ® ...

Page 2

Block Diagram fsela 250K TCLK_sel 250K VDD 250K 0 TCLK0 Ref-in 1 TCLK1 VCO-out 250K Feedback VDD 250K FB_In VDD 250K PLL_EN VCO_sel 250K fselb 250K fselc 250K fselFB1 250K fselFB0 250K VDD 250K OE VDD 250K MR# Table 1. ...

Page 3

Pin Description Pin Name PWR 2 MR fsel(a, PLL_EN 8 TCLK_sel 9,10 TCLK(0:1) 14,20 fselFB(0:1) 16,18,21,23, Qa(0:4) VDDa 25 29 QFB VDDFB O 31 FB_In 32,34,36,48, Qb(0:4) VDDb 40 44,46,48,50 Qc(0:3) VDDc ...

Page 4

Pin Description (continued) Pin Name PWR 35,39 VSSb 45,49 VDDc 43,47,51 VSSc 1 VSSA Glitch-Free Output Frequency Transitions Customarily when zero delay buffers have their internal counters change “on the fly” their output clock periods will: 1. Contain short ...

Page 5

Maximum Ratings Maximum Input Voltage Relative to V Maximum Input Voltage Relative to V Storage Temperature: ................................ – 150 C Operating Temperature: ................................ – +85 C Maximum Power Supply: ................................................5.5V This device contains circuitry ...

Page 6

... Note: All buffer outputs are tied to a common 3.3-Volt V Ordering Information Part Number IMIZ9974CA IMIZ9974CAT 52-pin TQFP–Tape and Reel Package Drawing and Dimensions 52-Lead Thin Plastic Quad Flat Pack (10x10x1.4 mm) A52 PowerPC is a registered trademark of International Business Machines. Pentium is a registered trademark of Intel Corporation. ...

Page 7

Document Title: Z9974 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Document #: 38-07090 REV. ECN NO. Issue Date ** 107126 06/05/01 *A 108068 07/03/01 *B 116195 08/14/02 *C 122775 12/21/02 Document #: 38-07090 Rev. *C Orig. of Change IKA Converted to ...

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