CY7C4255V-25ASC Cypress Semiconductor Corp, CY7C4255V-25ASC Datasheet - Page 6

• Manufacturer Part Number: CY7C4255V-25ASC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C4255V-25ASC

• Configuration: Dual
• Density: 144Kb
• Access Time (max): 15ns
• Word Size: 18b
• Organization: 8Kx18
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: TQFP
• Clock Freq (max): 40MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 30mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

Figure 2. Block Diagram of 8K/16K/32K/64K x 18 Low Voltage Synchronous FIFO Memory in Width Expansion Configuration
Depth Expansion Configuration (with Programmable Flags)
The CY7C4255/65/75/85V can easily be adapted to applications requiring more than 8K/16K/32K/64K words of buffering.
on page 7 shows Depth Expansion using three CY7C4255/65/ 75/85Vs. Maximum depth is limited only by signal loading. Follow these
steps:
Document #: 38-06012 Rev. *B
1. The first device must be designated by grounding the First Load (FL) control input.
2. All other devices must have FL in the HIGH state.
3. The Write Expansion Out (WXO) pin of each device must be tied to the Write Expansion In (WXI) pin of the next device.
4. The Read Expansion Out (RXO) pin of each device must be tied to the Read Expansion In (RXI) pin of the next device.
5. All Load (LD) pins are tied together.
6. The Half Full Flag (HF) is not available in the Depth Expansion Configuration.
7. EF, FF, PAE, and PAF are created with composite flags by ORing together these respective flags for monitoring. The composite
PAE and PAF flags are not precise.
FULL FLAG (FF)
DATA IN (D)
PROGRAMMABLE(PAE)
HALF FULL FLAG (HF)
WRITE CLOCK (WCLK)
WRITE ENABLE (WEN)
LOAD (LD)
36
18
FF
RESET (RS)
7C4255V
7C4265V
7C4275V
7C4285V
WRITE EXPANSION IN (WXI)
READ EXPANSION IN (RXI)
EF
FIRST LOAD (FL)
18
18
FF
RESET (RS)
7C4255V
7C4265V
7C4275V
7C4285V
EF
CY7C4255V, CY7C4265V
CY7C4275V, CY7C4285V
READ CLOCK (RCLK)
READ ENABLE (REN)
OUTPUT ENABLE (OE)
PROGRAMMABLE (PAF)
18
DATA OUT (Q)
EMPTY FLAG (EF)
4275V–24
36
Page 6 of 21
Figure 3
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