TB28F004SC-100 Intel, TB28F004SC-100 Datasheet - Page 23

• Manufacturer Part Number: TB28F004SC-100
• Manufacturer: Intel

Specifications of TB28F004SC-100

• Density: 4Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: -40C to 85C
• Package Type: SOP
• Program/erase Volt (typ): 3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 512K
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

FULL STATUS CHECK PROCEDURE
PRELIMINARY
Read Status Register
Program Complete
Program Successful
Data (See Above)
Data and Address
Check if Desired
Status Register
Full Status
Write 40H,
Write Byte
Address
SR.7 =
SR.4 =
Read
SR.3 =
SR.1 =
Start
0
0
0
1
0
1
1
1
Device Protect Error
V
PP
Program Error
No
Suspend
Program
Range Error
Figure 8. Automated Program Flowchart
Program Loop
Suspend
BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
Yes
Repeat for subsequent byte writes.
SR full status check can be done after each program, or after a
Write FFH after the last program operation to reset device to
SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register
If error is detected, clear the Status Register before attempting
sequence of program operations.
read array mode.
command in cases where multiple locations are written before
full status is checked.
retry or other error recovery.
Operation
Operation
Standby
Standby
Standby
Standby
Read
Write
Write
Bus
Bus
Command
Command
Program
Program
Setup
Check SR.1
1 = Device Protect Detect
Only required for systems
Data = 40H
Addr = Location to Be Programmed
Data = Data to Be Programmed
Addr = Location to Be Programmed
Status Register Data
Check SR.3
1 = V
Check SR.4
1 = Program Error
Check SR.7
1 = WSM Ready
0 = WSM Busy
implementing lock-bit configuration
RP# = V
PP
Error Detect
IH
Comments
Comments
, Block Lock-Bit Is Set
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