LH28F008SAHT-T9 Sharp Electronics, LH28F008SAHT-T9 Datasheet - Page 19

LH28F008SAHT-T9

Manufacturer Part Number
LH28F008SAHT-T9
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F008SAHT-T9

Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Compliant
Power Supply Decoupling
Flash memory power switching characteristics require care-
ful device decoupling. System designers are interested in 3
supply current issues; standby current levels (I
current levels (I
and rising edges of CE#. Transient current magnitudes de-
pend on the device outputs’ capacitive and inductive load-
ing. Two-line control and proper decoupling capacitor selec-
tion will suppress transient voltage peaks. Each device
should have a 0.1µF ceramic capacitor connected between
each V
high frequency, low inherent-inductance capacitors should
be placed as close as possible to package leads. Addition-
Continue Erase
Read Status
CC
Write B0H
Write FFH
Write D0H
Write 70H
Reading?
Register
SR.7=1
SR.6=1
Done
Start
and GND, and between its V
?
?
YES
YES
YES
CC
) and transient peaks produced by falling
NO
NO
NO
Completed
Erase Has
Figure 7. Erase Suspend/Resume Flowchart
PP
and GND. These
SB
), active
LHF08ST9
Operation
Standby/
Standby
Write
Write
Read
Write
Read
Write
Bus
ally, for every 8 devices, a 4.7µF electrolytic capacitor
should be placed at the array’s power supply connection
between V
voltage slumps caused by PC board trace inductances.
V
Writing flash memories, while they reside in the target sys-
tem, requires that the printed circuit board designer pay at-
tention to the V
the memory cell current for writing and erasing. Use similar
trace widths and layout considerations given to the V
power bus. Adequate V
decrease V
PP
Trace on Printed Circuit Boards
Status Register
Erase Resume
CC
PP
Read Array
Command
Suspend
and GND. The bulk capacitor will overcome
voltage spikes and overshoots.
Erase
Read
PP
power supply trace. The V
PP
Supply traces and decoupling will
Data=B0H
Data=70H
Check RY/BY#
V
or Read Status Register
Check SR.7
1=Ready, 0=Busy
Toggle OE# or CE# to
Update Status Register
Check SR.6
1=Suspended
Data=FFH
Read array data from block
other than that being
erased.
Data=D0H
OH
=Ready, V
Comments
OL
PP
=Busy
pin supplies
CC
16

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