LH28F800SGN-L10 Sharp Electronics, LH28F800SGN-L10 Datasheet - Page 14

• Manufacturer Part Number: LH28F800SGN-L10
• Manufacturer: Sharp Electronics

Specifications of LH28F800SGN-L10

• Cell Type: NOR
• Density: 8Mb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOP
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 3.6/5.5V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

At this point, a Read Array command can be
written to read data from blocks other than that
which is suspended. A Word Write command
sequence can also be issued during erase suspend
to program data in other blocks. Using the Word
Write Suspend command (see Section 4.8), a
word write operation can also be suspended.
During a word write operation with block erase
suspended, status register bit SR.7 will return to "0"
and the RY/BY# output will transition to V
However, SR.6 will remain "1" to indicate block
erase suspend status.
The only other valid commands while block erase is
suspended are Read Status Register and Block
Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM
will continue the block erase process. Status
register bits SR.6 and SR.7 will automatically clear
and RY/BY# will return to V
Resume
automatically outputs status register data when
read (see Fig. 5). V
(the same V
block erase is suspended. RP# must also remain at
V
erase). Block erase cannot resume until word write
operations initiated during block erase suspend
have completed.
4.8 Word Write Suspend Command
The Word Write Suspend command allows word
write interruption to read data in other flash memory
locations. Once the word write process starts,
writing the Word Write Suspend command requests
that the WSM suspend the word write sequence at
a predetermined point in the algorithm. The device
continues to output status register data when read
after the Word Write Suspend command is written.
Polling status register bits SR.7 and SR.2 can
determine when the word write operation has been
suspended (both will be set to "1"). RY/BY# will
also transition to V
the word write suspend latency.
IH
or V
HH
command
(the same RP# level used for block
PP
level used for block erase) while
OH
. Specification t
PP
is
must remain at V
written,
OL
. After the Erase
WHRH1
the
PPH1/2/3
defines
device
OL
- 14 -
.
At this point, a Read Array command can be
written to read data from locations other than that
which is suspended. The only other valid
commands while word write is suspended are Read
Status Register and Word Write Resume. After
Word Write Resume command is written to the
flash memory, the WSM will continue the word
write process. Status register bits SR.2 and SR.7
will automatically clear and RY/BY# will return to
V
written, the device automatically outputs status
register data when read (see Fig. 6). V
remain at V
word write) while in word write suspend mode. RP#
must also remain at V
level used for word write).
4.9 Set Block and Permanent Lock-
The combination of the software command
sequence and hardware RP# pin provides most
flexible block lock (write protection) capability. The
word write/block erase operation is restricted by the
status of block lock-bit, RP# pin and permanent
lock-bit. The status of RP# pin and permanent lock-
bit restricts the set block bit. When the permanent
lock-bit has not been set, and when RP# = V
the block lock bit can be set with the status of the
RP# pin. When RP# = V
can be set with the permanent lock-bit set
command. After the permanent lock-bit has been
set, the write/erase operation to the block lock-bit
can never be accepted. Refer to Table 5 for the
hardware and the software write protection.
Set block lock-bit and permanent lock-bit are
executed by a two-cycle command sequence. The
set block or permanent lock-bit setup along with
appropriate block or device address is written
followed by either the set block lock-bit confirm (and
an address within the block to be locked) or the set
permanent lock-bit confirm (and any device
address). The WSM then controls the set lock-bit
algorithm. After the sequence is written, the device
OL
. After the Word Write Resume command is
Bit Commands
PPH1/2/3
LH28F800SG-L (FOR SOP)
(the same V
IH
HH
or V
, the permanent lock-bit
HH
PP
(the same RP#
level used for
PP
must
HH
,