LH28F800BJHE-PBTL90 Sharp Electronics, LH28F800BJHE-PBTL90 Datasheet - Page 4
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LH28F800BJHE-PBTL90
Manufacturer Part Number
LH28F800BJHE-PBTL90
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F800BJHE-PBTL90.pdf
(58 pages)
Specifications of LH28F800BJHE-PBTL90
Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
20/19Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
1M/512K
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
1 INTRODUCTION.............................................................. 3
2 PRINCIPLES OF OPERATION........................................ 7
3 BUS OPERATION ............................................................ 8
4 COMMAND DEFINITIONS........................................... 10
sharp
1.1 Features ........................................................................ 3
1.2 Product Overview......................................................... 3
1.3 Product Description...................................................... 4
2.1 Data Protection............................................................. 8
3.1 Read.............................................................................. 8
3.2 Output Disable.............................................................. 8
3.3 Standby......................................................................... 8
3.4 Reset............................................................................. 8
3.5 Read Identifier Codes................................................... 9
3.6 OTP(One Time Program) Block .................................. 9
3.7 Write........................................................................... 10
4.1 Read Array Command................................................ 12
4.2 Read Identifier Codes Command ............................... 12
4.3 Read Status Register Command ................................. 12
4.4 Clear Status Register Command................................. 12
4.5 Block Erase Command............................................... 13
4.6 Full Chip Erase Command ......................................... 13
4.7 Word/Byte Write Command....................................... 13
4.8 Block Erase Suspend Command ................................ 14
4.9 Word/Byte Write Suspend Command ........................ 14
4.10 Set Block and Permanent Lock-Bit Commands ....... 15
4.11 Clear Block Lock-Bits Command ............................ 15
4.12 OTP Program Command .......................................... 16
4.13 Block Locking by the WP# ...................................... 16
1.3.1 Package Pinout ....................................................... 4
1.3.2 Block Organization................................................. 4
CONTENTS
PAGE
LHF80J05
5 DESIGN CONSIDERATIONS ....................................... 27
6 ELECTRICAL SPECIFICATIONS ................................ 29
7 PACKAGE AND PACKING SPECIFICATION............ 42
5.1 Three-Line Output Control ........................................ 27
5.2 RY/BY# and WSM Polling ....................................... 27
5.3 Power Supply Decoupling ......................................... 27
5.4 V
5.5 V
5.6 Power-Up/Down Protection....................................... 28
5.7 Power Dissipation ...................................................... 28
5.8 Data Protection Method ............................................. 28
6.1 Absolute Maximum Ratings ...................................... 29
6.2 Operating Conditions ................................................. 29
6.2.1 Capacitance .......................................................... 29
6.2.2 AC Input/Output Test Conditions ........................ 30
6.2.3 DC Characteristics ............................................... 31
6.2.4 AC Characteristics - Read-Only Operations ........ 33
6.2.5 AC Characteristics - Write Operations ................ 36
6.2.6 Alternative CE#-Controlled Writes...................... 38
6.2.7 Reset Operations .................................................. 40
6.2.8 Block Erase, Full Chip Erase, Word/Byte Write and
CCW
CC
Lock-Bit Configuration Performance ................. 41
, V
Trace on Printed Circuit Boards ..................... 27
CCW
, RP# Transitions .................................... 27
Rev. 1.27
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