AT45DB081A-TC Atmel, AT45DB081A-TC Datasheet - Page 5

• Manufacturer Part Number: AT45DB081A-TC
• Manufacturer: Atmel

Specifications of AT45DB081A-TC

• Density: 8Mb
• Access Time (max): 100ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 10mA
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / Rohs Status: Not Compliant

Status Register Format
Ready/Busy status is indicated using bit 7 of the status reg-
ister. If bit 7 is a 1, then the device is not busy and is ready
to accept the next command. If bit 7 is a 0, then the device
is in a busy state. The user can continuously poll bit 7 of the
status register by stopping SCK once bit 7 has been output.
The status of bit 7 will continue to be output on the SO pin,
and once the device is no longer busy, the state of SO will
change from 0 to 1. There are eight operations which can
cause the device to be in a busy state: Main Memory Page
to Buffer Transfer, Main Memory Page to Buffer Compare,
Buffer to Main Memory Page Program with Built-in Erase,
Buffer to Main Memory Page Program without Built-in
Erase, Page Erase, Block Erase, Main Memory Page Pro-
gram, and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer
Compare operation is indicated using bit 6 of the status
register. If bit 6 is a 0, then the data in the main memory
page matches the data in the buffer. If bit 6 is a 1, then at
least one bit of the data in the main memory page does not
match the data in the buffer.
The device density is indicated using bits 5, 4, and 3 of the
status register. For the AT45DB081A, the three bits are 1,
0 and 0. The decimal value of these three binary bits does
not equate to the device density; the three bits represent a
combinational code relating to differing densities of Serial
DataFlash devices, allowing a total of eight different density
configurations.
Program and Erase Commands
BUFFER WRITE: Data can be shifted in from the SI pin
into either buffer 1 or buffer 2. To load data into either
buffer, an 8-bit opcode, 84H for buffer 1 or 87H for buffer 2,
must be followed by 15 don't care bits and nine address
bits (BFA8-BFA0). The nine address bits specify the first
byte in the buffer to be written. The data is entered follow-
ing the address bits. If the end of the data buffer is reached,
the device will wrap around back to the beginning of the
buffer. Data will continue to be loaded into the buffer until a
low-to-high transition is detected on the CS pin.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH
BUILT-IN ERASE: Data written into either buffer 1 or buffer
2 can be programmed into the main memory. To start the
operation, an 8-bit opcode, 83H for buffer 1 or 86H for
buffer 2, must be followed by the three reserved bits, 12
address bits (PA11-PA0) that specify the page in the main
memory to be written, and nine additional don't care bits.
When a low-to-high transition occurs on the CS pin, the
RDY/BUSY
Bit 7
COMP
Bit 6
Bit 5
1
Bit 4
0
part will first erase the selected page in main memory to all
1s and then program the data stored in the buffer into the
specified page in the main memory. Both the erase and the
programming of the page are internally self-timed and
should take place in a maximum time of t
time, the status register will indicate that the part is busy.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH-
OUT BUILT-IN ERASE: A previously erased page within
main memory can be programmed with the contents of
either buffer 1 or buffer 2. To start the operation, an 8-bit
opcode, 88H for buffer 1 or 89H for buffer 2, must be
followed by the three reserved bits, 12 address bits (PA11-
PA0) that specify the page in the main memory to be writ-
ten, and nine additional don’t care bits. When a low-to-high
transition occurs on the CS pin, the part will program the
data stored in the buffer into the specified page in the main
memory. It is necessary that the page in main memory that
is being programmed has been previously erased. The pro-
gramming of the page is internally self-timed and should
take place in a maximum time of t
status register will indicate that the part is busy.
PAGE ERASE: The optional Page Erase command can be
used to individually erase any page in the main memory
array allowing the Buffer to Main Memory Page Program
without Built-in Erase command to be utilized at a later
time. To perform a Page Erase, an opcode of 81H must be
loaded into the device, followed by three reserved bits,
12 address bits (PA11-PA0), and nine don’t care bits. The
nine address bits are used to specify which page of the
memory array is to be erased. When a low-to-high transi-
tion occurs on the CS pin, the part will erase the selected
page to 1s. The erase operation is internally self-timed and
should take place in a maximum time of t
time, the status register will indicate that the part is busy.
BLOCK ERASE: A block of eight pages can be erased at
one time allowing the Buffer to Main Memory Page Pro-
gram without Built-in Erase command to be utilized to
reduce programming times when writing large amounts of
data to the device. To perform a Block Erase, an opcode of
50H must be loaded into the device, followed by three
reserved bits, nine address bits (PA11-PA3), and 12 don’t
care bits. The nine address bits are used to specify which
block of eight pages is to be erased. When a low-to-high
transition occurs on the CS pin, the part will erase the
selected block of eight pages to 1s. The erase operation is
internally self-timed and should take place in a maximum
time of t
that the part is busy.
Bit 3
0
BE
. During this time, the status register will indicate
Bit 2
X
Bit 1
P
. During this time, the
X
EP
PE
. During this
. During this
Bit 0
X
5