M29F080A90M6 Micron Technology Inc, M29F080A90M6 Datasheet - Page 3

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M29F080A90M6

Manufacturer Part Number
M29F080A90M6
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29F080A90M6

Lead Free Status / Rohs Status
Compliant

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0
Table 2. Absolute Maximum Ratings
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
Table 3. Uniform Block Addresses, M29F080A
15
14
13
12
11
10
#
9
8
7
6
5
4
3
2
1
0
Symbol
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.
V
T
T
V
IO
V
BIAS
T
STG
(Kbytes)
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
CC
ID
A
(2)
Size
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
Ambient Operating Temperature (Temperature Range Option 1)
Ambient Operating Temperature (Temperature Range Option 6)
Ambient Operating Temperature (Temperature Range Option 3)
Temperature Under Bias
Storage Temperature
Input or Output Voltage
Supply Voltage
Identification Voltage
D0000h-DFFFFh
C0000h-CFFFFh
E0000h-EFFFFh
B0000h-BFFFFh
A0000h-AFFFFh
Address Range
F0000h-FFFFFh
90000h-9FFFFh
80000h-8FFFFh
70000h-7FFFFh
60000h-6FFFFh
50000h-5FFFFh
40000h-4FFFFh
30000h-3FFFFh
20000h-2FFFFh
10000h-1FFFFh
00000h-0FFFFh
Protection
(1)
Parameter
Group
7
6
5
4
3
2
1
0
SIGNAL DESCRIPTIONS
See Figure 1, Logic Diagram, and Table 1, Signal
Names, for a brief overview of the signals connect-
ed to this device.
Address Inputs (A0-A19). The Address Inputs
select the cells in the memory array to access dur-
ing Bus Read operations. During Bus Write opera-
tions they control the commands sent to the
Command Interface of the internal state machine.
Data Inputs/Outputs (DQ0-DQ7). The Data In-
puts/Outputs output the data stored at the selected
address during a Bus Read operation. During Bus
Write operations they represent the commands
sent to the Command Interface of the internal state
machine.
Chip Enable (E). The Chip Enable, E, activates
the memory, allowing Bus Read and Bus Write op-
erations to be performed. When Chip Enable is
High, V
Output Enable (G). The Output Enable, G, con-
trols the Bus Read operation of the memory.
Write Enable (W). The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Reset/Block Temporary Unprotect (RP). The Re-
set/Block Temporary Unprotect pin can be used to
apply a Hardware Reset to the memory or to tem-
porarily unprotect all blocks that have been pro-
tected.
IH
, all other pins are ignored.
–0.6 to 13.5
–40 to 125
–50 to 125
–65 to 150
–40 to 85
–0.6 to 6
–0.6 to 6
0 to 70
Value
M29F080A
Unit
°C
°C
°C
°C
°C
V
V
V
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