SL811HST Cypress Semiconductor Corp, SL811HST Datasheet - Page 4

SL811HST

Manufacturer Part Number
SL811HST
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of SL811HST

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

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normal RAM accesses (see Section 5.6) and provide control
and status information for USB transactions.
Any Write to control register 0FH will enable the SL811HS full
features bit. This is an internal bit of the SL811HS that enables
additional features not supported by the SL11H. For SL11H
hardware backward compatibility, this register should not be
accessed.
Table 3-1. shows the memory map and register mapping of
both the SL11H and SL811HS in master/host mode. The
SL11H is shown for users upgrading to the SL811HS.
3.1
Table 3-1. SL811HS Master (Host) Register Summary
The registers in the SL811HS are divided into two major
groups. The first group is referred to as USB Control registers.
These registers enable and provide status for control of USB
transactions and data flow. The second group of registers
provides control and status for all other operations.
Document 38-08008 Rev. *B
USB-A Host Control Register
USB-A Host Base Address
USB-A Host Base Length
USB-A Host PID, Device Endpoint
(Write)/USB Status (Read)
USB-A Host Device Address
(Write)/Transfer Count (Read)
Control Register 1
Interrupt Enable Register
Reserved Register
USB-B Host Control Register
USB-B Host Base Address
USB-B Host Base Length
USB-B Host PID, Device Endpoint
(Write)/USB Status (Read)
USB-B Host Device Address
(Write)/Transfer Count (Read)
Status Register
SOF Counter LOW (Write)/HW Revi-
sion Register (Read)
SOF Counter HIGH and Control Regis-
ter 2
Memory Buffer
Register Name SL11H and SL811HS
SL811HS Master (Host) Mode Registers
SL11H (hex)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Address
10h-FFh
0Dh
0Eh
00h
01h
02h
03h
04h
05h
06h
SL811HS (hex)
Reserved
Address
10H-FFh
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
08h
09h
3.1.1
The following registers initialize to zero on power-up and reset:
All other registers power-up and reset in an unknown state and
should be initialized by firmware.
3.1.2
Communication and data flow on the USB bus uses the
SL811HS’ USB A-B Control Registers. The SL811HS can
communicate with any USB Device functions and any specific
endpoints via the USB-A or USB-B register sets.
The USB A-B Host Control Registers can be used in an
overlapped configuration to manage traffic on the USB bus.
The USB Host Control Register also provides a means to
interrupt an external CPU or Micro Controller when one of the
USB protocol transactions is completed. Table 3-1 and
Table 3-2 show the two sets of USB Host Control Registers,
the “A” set and “B” set. The two register sets allow for
overlapped operation. When one set of parameters is being
set up, the other can be transferring. On completion of a
transfer to an endpoint, the next operation will be controlled by
the other register set.
Note. On the SL11H, the USB-B set control registers are not
used. The USB-B register set can be used only when
SL811HS mode is enabled by initializing register 0FH.
The SL811HS USB Host Control has two groups of five
registers each, which map in the SL811HS memory space.
These registers are defined in the following tables.
3.1.2.1 SL811HS Host Control Registers
Table 3-2. SL811HS Host Control Registers
Register Name SL11H and SL811H
USB-A Host Control Register
USB-A Host Base Address
USB-A Host Base Length
USB-A Host PID, Device Endpoint
(Write)/USB Status (Read)
USB-A Host Device Address
(Write)/Transfer Count (Read)
USB-B Host Control Register
USB-B Host Base Address
USB-B Host Base Length
USB-B Host PID, Device Endpoint
(Write)/USB Status (Read)
USB-B Host Device Address
(Write)/Transfer Count (Read)
• USB-A/USB-B Host Control Register [00H, 08H] bit 0 only
• Control Register 1 [05H]
• USB Address Register [07H]
• Current Data Set/Hardware Revision/SOF Counter LOW
Register [0EH]
Register Values on Power-up and Reset
USB Control Registers
SL11H (hex)
Reserved
Reserved
Reserved
Reserved
Reserved
Address
00h
01h
02h
03h
04h
SL811HS
SL811HS (hex)
Page 4 of 32
Address
0Ch
00h
01h
02h
03h
04h
08h
09h
0Ah
0Bh
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